JPS61151745A - Interruption processing system - Google Patents

Abstract

PURPOSE:To modify an external interruption request depending on the internal state of a processor by outputting an interruption vector designating an entry point of an interruption processing routine and an interruption request to a processor from an interruption request controller. CONSTITUTION:When any of external interruption requests 1 is active, the interruption controller 3 generates an interruption vector and transmits it to a sequencer 7 of a processor 6 via a signal line 4. The sequencer 7 loads an interruption vector on a program counter 8. When the interruption vector is an entry point of a corresponding processing routine in an instruction memory 9, the processing is started by the next instruction cycle. Further, the processing is started after two instruction cycles even for a pointer to a jump table to the processing routine. In rewriting the content of a status register 10 in the processing routine, even when the same external interruption request 1 is active, the other processing routine is started while the processor 6 does not sense the internal state.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention is directed to an external interrupt request (hereinafter referred to as an "external interrupt request").
This relates to a processor interrupt processing method in which the processing for (2) changes depending on the internal state of the processor at that time.

[Conventional technology]

Conventionally, this type of interrupt processing first accepts an external interrupt request and enters the interrupt processing routine, and where the processing is divided depending on the internal state of the processor, an instruction that senses the internal state such as a test bit instruction is used. The method used was to branch to the corresponding processing routine by using conditional branching using , or by providing a jump table to the interrupt processing routine using the internal state as an index.

[Problem that the invention seeks to solve]

In the method of branching by sensing the internal state of the processor using test bit instructions, etc., several jump instructions are executed from the time an external interrupt request is received until the desired processing starts. Therefore, if the number of internal states is large, there is a possibility that the time delay until the start of processing cannot be ignored. Furthermore, as shown in FIG. 2, there is also a method of referring to the jump table 12 using the state in the status register 11 as an index.
It is necessary that the expression represents the address of the address or the displacement from the start address of the jump table. Otherwise, further conversion work from the state to the address or displacement is required, which also causes overhead. . In other words, in the conventional method, when seeking entry to an interrupt handling routine that is determined by an external interrupt request and the internal state of the processor at that time, entry is first made to the external interrupt handling routine, and then entry is determined based on the internal state. There is a problem in that the two-stage configuration generates overhead.

[Means for solving problems]

In order to solve these problems, the present invention inputs the internal state of the processor and the external interrupt request held in the status register to the interrupt controller, and then inputs the internal state of the processor and the external interrupt request held in the status register. By outputting from the interrupt request controller an interrupt vector specifying the entry point of the interrupt handling routine determined by the interrupt request controller, an external interrupt request can be qualified by the internal state of the processor. It was designed to do so.

[Effect]

In the present invention, the interrupt request output from the interrupt controller and the interrupt vector indicating the entry point of the interrupt processing routine determined by the internal state of the processor are input to the processor, thereby eliminating overhead.

〔Example〕

FIG. 1 shows a block system for explaining one embodiment of the interrupt processing method according to the present invention. In FIG. 1, 1 is a signal line that transmits external interrupt requests, 2 is a signal line that transmits the internal state of the processor, 3 is an interrupt controller to which external interrupt requests are input, and 4 is from interrupt controller 3. A signal line for transmitting an output interrupt request, 5 a signal line for transmitting an interrupt vector output from the interrupt controller 3, 6 a processor, 7 a sequencer, 8 a program counter,
9 is an instruction memory, and 10 is a status register that holds the internal state of the program.

Next, the operation in this embodiment will be explained.

An external interrupt request is input to the interrupt controller 3 via a signal line 1, and an internal state of the processor 6 held in a status register 10 of the processor 6 is input via a signal line 2. When one of the external interrupt requests becomes active, the interrupt controller 3 generates an interrupt vector determined by the internal state of the processor 6 at that time and the external interrupt request that became active, and sends the interrupt request. is sent to the sequencer 7 of the processor 6 via the signal line 4. If the sequencer 7 is in an interrupt enabled state, it loads the interrupt vector into the program counter 8. If this interrupt vector is the entry point of the corresponding processing routine in instruction memory 9, processing will start in the next instruction cycle, and if the interrupt vector is a pointer to a jump table to the processing routine. However, processing starts after two instruction cycles. If the contents of the status register IO are rewritten within this processing routine, that is, if the internal state of the processor 6 is made to transition, the processor 6 will sense the internal state even when the same external interrupt request becomes active next time. It is possible to start another processing routine without doing so.

〔Effect of the invention〕

As described above, the present invention provides an interrupt request controller that transmits an interrupt vector that specifies the entry point of an interrupt processing routine determined by the internal state of the processor and an external interrupt request, and an interrupt request to the processor. Since the external interrupt request can be qualified by the internal state of the processor by outputting it from
This method has the advantage that even when the processor has many internal states and the interrupt processing is divided into multiple branches in the conventional method, processing can be executed efficiently.

[Brief explanation of drawings]

FIG. 1 is a block system diagram for explaining an embodiment of the interrupt processing method according to the present invention, and FIG. 2 is a jump table diagram for explaining the operation of the conventional interrupt processing method. 1-5...Signal line, 6...Processor, 7...
...Sequencer, 8...Program counter, 9.
...Instruction memory, 10...Status register.

Claims (1)

[Claims] An interrupt processing routine that inputs the internal state of the processor held in a status register and an external interrupt request to an interrupt controller, and is determined based on the internal state of the processor and the external interrupt request. An interrupt vector specifying an entry point of the processor and an interrupt request to the processor are output from the interrupt request controller, and the interrupt request from the outside can be modified by the internal state of the processor. Interrupt handling method.