JPS61146026U - - Google Patents
Info
- Publication number
- JPS61146026U JPS61146026U JP2891785U JP2891785U JPS61146026U JP S61146026 U JPS61146026 U JP S61146026U JP 2891785 U JP2891785 U JP 2891785U JP 2891785 U JP2891785 U JP 2891785U JP S61146026 U JPS61146026 U JP S61146026U
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- output
- pass filter
- low
- controlled oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
Description
第１図はトラツキングエラーの特性図で、イは
従来例、ロは実施例を現わす。第２図はこの考案
の実施例を説明するブロツク図、第３図は高周波
増幅器２を説明するブロツク図、第４図は局部発
振回路３を説明するブロツク図、第５図はチユー
ニング電圧発生回路図、である。
１……アンテナ、２……高周波増幅器、３……
局部発振回路、４……混合器、５……中間周波増
幅器、５……復調器。
FIG. 1 is a tracking error characteristic diagram, in which A shows the conventional example and B shows the embodiment. FIG. 2 is a block diagram explaining an embodiment of this invention, FIG. 3 is a block diagram explaining the high frequency amplifier 2, FIG. 4 is a block diagram explaining the local oscillation circuit 3, and FIG. 5 is a tuning voltage generating circuit. Figure. 1...Antenna, 2...High frequency amplifier, 3...
Local oscillation circuit, 4... Mixer, 5... Intermediate frequency amplifier, 5... Demodulator.
Claims (1)
出力を適宜に分周するプログラマブル分周器、該
プログラマブル分周器の出力と基準周波数発振器
の出力とを周波数及び位相比較する位相比較器、
該位相比較器の出力を平滑する低域フイルタ、の
帰還系で、前記低域フイルタの出力で前記電圧制
御発振器の発振周波数を制御する所謂ＰＬＬ周波
数シンセサイザを局部発振器に用いたスーパーヘ
テロダイン方式の受信機において、前記低域フイ
ルタの出力に受信周波数帯域を周波数分割した分
割周波数帯ごとに設定の直流バイアス電圧を重畳
して高周波増幅器の同調素子として用いた可変容
量ダイオードに印加したことを特徴とする受信機
。 Inside, there is a voltage controlled oscillator, a programmable frequency divider that divides the output of the voltage controlled oscillator as appropriate, and a phase comparator that compares the frequency and phase of the output of the programmable frequency divider and the output of the reference frequency oscillator.
Superheterodyne reception using a so-called PLL frequency synthesizer as a local oscillator, which controls the oscillation frequency of the voltage-controlled oscillator with the output of the low-pass filter in a feedback system of a low-pass filter that smoothes the output of the phase comparator. The apparatus is characterized in that a DC bias voltage set for each divided frequency band obtained by frequency-dividing the receiving frequency band is superimposed on the output of the low-pass filter and applied to a variable capacitance diode used as a tuning element of a high-frequency amplifier. Receiving machine.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2891785U JPS61146026U (en) | 1985-02-28 | 1985-02-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2891785U JPS61146026U (en) | 1985-02-28 | 1985-02-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61146026U true JPS61146026U (en) | 1986-09-09 |
Family
ID=30527246
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2891785U Pending JPS61146026U (en) | 1985-02-28 | 1985-02-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61146026U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56110331A (en) * | 1980-02-05 | 1981-09-01 | General Denshi Kogyo Kk | Automatic tracking compensation circuit for electronic tuner |
-
1985
- 1985-02-28 JP JP2891785U patent/JPS61146026U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56110331A (en) * | 1980-02-05 | 1981-09-01 | General Denshi Kogyo Kk | Automatic tracking compensation circuit for electronic tuner |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS61146026U (en) | ||
| JPS6322738Y2 (en) | ||
| JPS5984934U (en) | phase locked loop | |
| JPS61156310U (en) | ||
| JPS63158018U (en) | ||
| JPS5838665Y2 (en) | Receiving machine | |
| JPS6143321Y2 (en) | ||
| JPS6364106U (en) | ||
| JPH0273851U (en) | ||
| JPH021930U (en) | ||
| JPS593625U (en) | Electronic channel selection device | |
| JPH0382944U (en) | ||
| JPS63102371U (en) | ||
| JPS58155149U (en) | Electronic channel selection device | |
| JPS6444730U (en) | ||
| JPS62125030U (en) | ||
| JPS63129335U (en) | ||
| JPS59169149U (en) | Receiving machine | |
| JPS62159030U (en) | ||
| JPS63133734U (en) | ||
| JPH0434028U (en) | ||
| JPS6230426U (en) | ||
| JPS6093339U (en) | Chuyuna | |
| JPS6452326U (en) | ||
| JPH0348938U (en) |