JPS6230426U - - Google Patents

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Publication number
JPS6230426U
JPS6230426U JP11959485U JP11959485U JPS6230426U JP S6230426 U JPS6230426 U JP S6230426U JP 11959485 U JP11959485 U JP 11959485U JP 11959485 U JP11959485 U JP 11959485U JP S6230426 U JPS6230426 U JP S6230426U
Authority
JP
Japan
Prior art keywords
voltage
phase difference
signal
generating
oscillation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11959485U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11959485U priority Critical patent/JPS6230426U/ja
Publication of JPS6230426U publication Critical patent/JPS6230426U/ja
Pending legal-status Critical Current

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、第2
図は第1図の具体的回路構成を示す回路図、第3
図は従来例を示す回路図である。 主要部分の符号の説明、1……電圧制御発振器
(VCO)、2……分周器、4……ループフイル
タ回路、8a,8B……分圧回路。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
The figure is a circuit diagram showing the specific circuit configuration of Figure 1, and Figure 3.
The figure is a circuit diagram showing a conventional example. Explanation of symbols of main parts: 1... Voltage controlled oscillator (VCO), 2... Frequency divider, 4... Loop filter circuit, 8a, 8B... Voltage dividing circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力電圧レベルに応じた周波数の発振信号を発
生する電圧制御発振手段と、前記発振信号と所定
周波数の基準信号との位相差の大きさに応じた位
相差信号を発生する位相比較手段と、前記位相差
信号に応じたレベルの直流電圧を前記電圧制御発
振手段に供給するループフイルタ手段とを含み、
前記ループフイルタ手段は出力電圧の最小値及び
最大値を所定レベル範囲内に保持する分圧回路を
有することを特徴とするフエイズロツクループ回
路。
voltage-controlled oscillation means for generating an oscillation signal with a frequency corresponding to an input voltage level; phase comparison means for generating a phase difference signal according to the magnitude of the phase difference between the oscillation signal and a reference signal of a predetermined frequency; loop filter means for supplying a DC voltage at a level corresponding to the phase difference signal to the voltage controlled oscillation means,
A phase lock loop circuit characterized in that said loop filter means has a voltage dividing circuit that maintains a minimum value and a maximum value of an output voltage within a predetermined level range.
JP11959485U 1985-08-03 1985-08-03 Pending JPS6230426U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11959485U JPS6230426U (en) 1985-08-03 1985-08-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11959485U JPS6230426U (en) 1985-08-03 1985-08-03

Publications (1)

Publication Number Publication Date
JPS6230426U true JPS6230426U (en) 1987-02-24

Family

ID=31007112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11959485U Pending JPS6230426U (en) 1985-08-03 1985-08-03

Country Status (1)

Country Link
JP (1) JPS6230426U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59115623A (en) * 1982-12-22 1984-07-04 Seiko Epson Corp Pll
JPS6054523A (en) * 1983-09-05 1985-03-29 Victor Co Of Japan Ltd Phase lock loop circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59115623A (en) * 1982-12-22 1984-07-04 Seiko Epson Corp Pll
JPS6054523A (en) * 1983-09-05 1985-03-29 Victor Co Of Japan Ltd Phase lock loop circuit

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