JPH0382944U - - Google Patents
Info
- Publication number
- JPH0382944U JPH0382944U JP14378989U JP14378989U JPH0382944U JP H0382944 U JPH0382944 U JP H0382944U JP 14378989 U JP14378989 U JP 14378989U JP 14378989 U JP14378989 U JP 14378989U JP H0382944 U JPH0382944 U JP H0382944U
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- voltage
- oscillation circuit
- controlled oscillation
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims description 9
- 238000010586 diagram Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
Description
第１図は本考案のシンセサイザー受信機の代表
的な実施例の構成を示す図、第２図は従来のシン
セサイザー受信機の構成を示す図である。
１……周波数変換回路、２……第１の電圧制御
型発振回路、３……第１の可変分周回路、５……
第１の分周回路、６……第１の位相比較回路、７
……第１のローパスフイルタ、９……第１のＰＬ
Ｌ、１０……第２の電圧制御型発振回路、１１…
…第２の可変分周回路、１２……基準発振器、１
３……第２の分周回路、１４……第２の位相比較
回路、１５……第２のローパスフイルタ、１６…
…第２のＰＬＬ。
FIG. 1 is a diagram showing the configuration of a typical embodiment of the synthesizer receiver of the present invention, and FIG. 2 is a diagram showing the configuration of a conventional synthesizer receiver. DESCRIPTION OF SYMBOLS 1... Frequency conversion circuit, 2... First voltage controlled oscillation circuit, 3... First variable frequency dividing circuit, 5...
First frequency divider circuit, 6...First phase comparison circuit, 7
...First low-pass filter, 9...First PL
L, 10... second voltage controlled oscillation circuit, 11...
...Second variable frequency divider circuit, 12...Reference oscillator, 1
3...Second frequency divider circuit, 14...Second phase comparison circuit, 15...Second low-pass filter, 16...
...Second PLL.
Claims (1)
出力信号ｆ２とを周波数混合してその差の周波数
を有する中間周波信号ｆ３を取り出すようにした
構成であつて、上記第１の電圧制御型発振回路２
の出力信号ｆ２を第１の可変分周回路３によつて
分周した分周出力と第１の基準信号ｆｓとを位相
比較し、この位相比較出力に比例した電圧を周波
数制御電圧として上記第１の電圧制御型発振回路
２に供給するようにした第１のＰＬＬを具備する
シンセサイザー受信機において、 第２の基準信号ｆｓ２と、第２の電圧制御型発
振回路１０の出力信号を第２の可変分周回路１１
によつて分周した分周出力とを位相比較し、この
位相比較出力に比例した電圧を周波数制御電圧と
して上記第２の電圧制御型発振回路１０に供給し
て第２のＰＬＬを構成し、上記第２の電圧制御型
発振回路１０の出力信号を分周した分周出力を上
記第１の基準信号ｆｓとすることを特徴とするシ
ンセサイザー受信機。[Claims for Utility Model Registration] A configuration in which the received signal f1 and the output signal f2 of the first voltage-controlled oscillation circuit 2 are frequency-mixed and an intermediate frequency signal f3 having a frequency difference between the two is extracted. , the first voltage-controlled oscillation circuit 2
The frequency-divided output obtained by dividing the output signal f2 by the first variable frequency dividing circuit 3 and the first reference signal fs are phase-compared, and a voltage proportional to this phase comparison output is set as the frequency control voltage. In a synthesizer receiver equipped with a first PLL that is supplied to a first voltage-controlled oscillation circuit 2, a second reference signal fs2 and an output signal of the second voltage-controlled oscillation circuit 10 are connected to a second voltage-controlled oscillation circuit 10. Variable frequency divider circuit 11
Compare the phases of the frequency-divided output with the frequency-divided output, and supply a voltage proportional to the phase comparison output as a frequency control voltage to the second voltage-controlled oscillation circuit 10 to configure a second PLL, A synthesizer receiver characterized in that a frequency-divided output obtained by frequency-dividing the output signal of the second voltage-controlled oscillation circuit 10 is used as the first reference signal fs.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14378989U JPH0382944U (en) | 1989-12-12 | 1989-12-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14378989U JPH0382944U (en) | 1989-12-12 | 1989-12-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0382944U true JPH0382944U (en) | 1991-08-23 |
Family
ID=31690544
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14378989U Pending JPH0382944U (en) | 1989-12-12 | 1989-12-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0382944U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011161153A (en) * | 2010-02-15 | 2011-08-25 | Haruo Tasaka | Aid for wearing garment |
-
1989
- 1989-12-12 JP JP14378989U patent/JPH0382944U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011161153A (en) * | 2010-02-15 | 2011-08-25 | Haruo Tasaka | Aid for wearing garment |