JPS62159030U - - Google Patents

Info

Publication number
JPS62159030U
JPS62159030U JP4887786U JP4887786U JPS62159030U JP S62159030 U JPS62159030 U JP S62159030U JP 4887786 U JP4887786 U JP 4887786U JP 4887786 U JP4887786 U JP 4887786U JP S62159030 U JPS62159030 U JP S62159030U
Authority
JP
Japan
Prior art keywords
frequency
circuit
signal
frequency dividing
programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4887786U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4887786U priority Critical patent/JPS62159030U/ja
Publication of JPS62159030U publication Critical patent/JPS62159030U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の実施例を示すブロツク回路
図、第2図は、従来回路の例を示すブロツク回路
図、第3図は、従来回路と本考案の回路との特性
の違いを示す図、第4図は、本考案の制御回路の
動作を説明するためのフローチヤートである。 主要部分の符号の説明、1…基準周波数発振器
、4…プログラマブル分周器、9…制御回路、2
1…可変分周回路。
Fig. 1 is a block circuit diagram showing an embodiment of the present invention, Fig. 2 is a block circuit diagram showing an example of a conventional circuit, and Fig. 3 shows the difference in characteristics between the conventional circuit and the circuit of the present invention. 4 are flowcharts for explaining the operation of the control circuit of the present invention. Explanation of symbols of main parts, 1... Reference frequency oscillator, 4... Programmable frequency divider, 9... Control circuit, 2
1...Variable frequency divider circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 比較基準周波数信号を得る基準周波数発振回路
と、制御信号に応じた周波数の局発信号を得る可
変周波数発振回路と、前記局発信号を選局周波数
に対応する分周比にて分周するプログラマブル分
周回路と、選局チヤンネル指令信号に基づいて前
記分周比を設定する制御回路と、前記比較基準周
波数信号と前記プログラマブル分周回路の出力信
号との位相差に応じた位相差信号を得る位相比較
回路と、前記位相差信号を平滑して前記制御信号
を得るローパスフイルタ回路とを含む周波数シン
セサイザチユーナであつて、前記局発信号を分周
して前記プログラマブル分周回路に供給する可変
分周回路を備え、前記制御回路は前記選局チヤン
ネル指令信号に基づいて前記プログラマブル分周
回路の分周比及び前記可変分周回路の分周比を設
定することを特徴とする周波数シンセサイザチユ
ーナ。
A reference frequency oscillator circuit that obtains a comparison reference frequency signal, a variable frequency oscillator circuit that obtains a local oscillator signal with a frequency corresponding to a control signal, and a programmable circuit that divides the local oscillator signal at a division ratio corresponding to the selected channel frequency. a frequency dividing circuit; a control circuit that sets the frequency dividing ratio based on a channel selection command signal; and obtaining a phase difference signal corresponding to the phase difference between the comparison reference frequency signal and the output signal of the programmable frequency dividing circuit. A variable frequency synthesizer tuner including a phase comparison circuit and a low-pass filter circuit that smoothes the phase difference signal to obtain the control signal, the frequency synthesizer tuner dividing the frequency of the local oscillation signal and supplying the frequency to the programmable frequency dividing circuit. A frequency synthesizer tuner comprising a frequency dividing circuit, wherein the control circuit sets a frequency dividing ratio of the programmable frequency dividing circuit and a frequency dividing ratio of the variable frequency dividing circuit based on the channel selection channel command signal. .
JP4887786U 1986-03-31 1986-03-31 Pending JPS62159030U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4887786U JPS62159030U (en) 1986-03-31 1986-03-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4887786U JPS62159030U (en) 1986-03-31 1986-03-31

Publications (1)

Publication Number Publication Date
JPS62159030U true JPS62159030U (en) 1987-10-08

Family

ID=30870820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4887786U Pending JPS62159030U (en) 1986-03-31 1986-03-31

Country Status (1)

Country Link
JP (1) JPS62159030U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5784629A (en) * 1980-11-14 1982-05-27 Sony Corp Channel selection circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5784629A (en) * 1980-11-14 1982-05-27 Sony Corp Channel selection circuit

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