JPH0348938U - - Google Patents
Info
- Publication number
- JPH0348938U JPH0348938U JP10811989U JP10811989U JPH0348938U JP H0348938 U JPH0348938 U JP H0348938U JP 10811989 U JP10811989 U JP 10811989U JP 10811989 U JP10811989 U JP 10811989U JP H0348938 U JPH0348938 U JP H0348938U
- Authority
- JP
- Japan
- Prior art keywords
- frequency division
- division ratio
- band
- output
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Circuits Of Receivers In General (AREA)
Description
第1図は本考案の一実施例を示す図、第2図は
そのフローチヤート、第3図は従来例を示す図で
ある。
1,2,3……VCO、4……ゲート回路、5
……プログラマブル分周器、6……位相比較器、
7……基準周波数発振器、8……ローパスフイル
タ、9,9′……制御回路、10……バンド切換
スイツチ、11……RAM、12……ROM。
FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a flowchart thereof, and FIG. 3 is a diagram showing a conventional example. 1, 2, 3...VCO, 4...gate circuit, 5
...Programmable frequency divider, 6...Phase comparator,
7... Reference frequency oscillator, 8... Low pass filter, 9, 9'... Control circuit, 10... Band selection switch, 11... RAM, 12... ROM.
Claims (1)
の電圧制御発振器からの出力を分周比Nで分周す
るプログラマブル分周器、このプログラマブル分
周器の分周出力と基準周波数発振器の発振出力と
を比較する位相比較器、この位相比較器からの出
力が供給され、前記電圧制御発振器へ制御電圧を
供給するローパスフイルタよりなる位相同期ルー
プにて局部発振回路が構成された多バンド受信機
であつて、バンド切換時、前記プログラマブル分
周器に仮の分周比データを一旦設定した後、正規
の分周比データを設定する制御回路を設けたこと
を特徴とする多バンド受信機。 (2) 前記仮の分周比データが、バンド切換操作
前の受信バンドにおける端周波数に関する分周比
データであることを特徴とする請求項1記載の多
バンド受信機。[Claims for Utility Model Registration] (1) A voltage controlled oscillator provided for each band, a programmable frequency divider that divides the output from this voltage controlled oscillator by a frequency division ratio N, and frequency division of this programmable frequency divider. A local oscillation circuit is operated by a phase-locked loop consisting of a phase comparator that compares the output with the oscillation output of the reference frequency oscillator, and a low-pass filter to which the output from this phase comparator is supplied and which supplies a control voltage to the voltage-controlled oscillator. The multi-band receiver is characterized by being provided with a control circuit that once sets temporary frequency division ratio data in the programmable frequency divider and then sets regular frequency division ratio data when switching bands. Multi-band receiver. (2) The multi-band receiver according to claim 1, wherein the temporary frequency division ratio data is frequency division ratio data regarding an edge frequency in a reception band before a band switching operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10811989U JPH0628837Y2 (en) | 1989-09-14 | 1989-09-14 | Multi band receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10811989U JPH0628837Y2 (en) | 1989-09-14 | 1989-09-14 | Multi band receiver |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0348938U true JPH0348938U (en) | 1991-05-13 |
JPH0628837Y2 JPH0628837Y2 (en) | 1994-08-03 |
Family
ID=31656779
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10811989U Expired - Fee Related JPH0628837Y2 (en) | 1989-09-14 | 1989-09-14 | Multi band receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0628837Y2 (en) |
-
1989
- 1989-09-14 JP JP10811989U patent/JPH0628837Y2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH0628837Y2 (en) | 1994-08-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4152669A (en) | Phase locked loop with means for preventing locking at undesired frequencies | |
EP0369660A3 (en) | Microwave frequency synthesizer with a frequency offset generator | |
US4994762A (en) | Multiloop synthesizer with optimal spurious performance | |
JPH02188027A (en) | Frequency synthesizer | |
JPH0348938U (en) | ||
JPS5924191Y2 (en) | Synthesizer-receiver AFC circuit | |
JP2947203B2 (en) | Frequency synthesizer | |
JPS6119184B2 (en) | ||
JPH02145830U (en) | ||
JPS5571328A (en) | Frequency synthesizer | |
JPH0382944U (en) | ||
JPS6348997Y2 (en) | ||
JPS61146026U (en) | ||
JPS581572B2 (en) | Frequency synthesizer tuning device | |
JPS6143321Y2 (en) | ||
JPS63102371U (en) | ||
JPS6019857B2 (en) | Receiving machine | |
JPH0362730A (en) | Frequency synthesizer | |
JPH04271520A (en) | Multi-pll synthesizer | |
JPS61144134A (en) | Am/fm receiver | |
JPS6232648U (en) | ||
JPH01142227U (en) | ||
JPS63131467U (en) | ||
JPS57166740A (en) | Phase lock loop frequency synthesizer | |
JPS6438832U (en) |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |