JPS6113952U - Lead frame for semiconductor devices - Google Patents

Lead frame for semiconductor devices

Info

Publication number
JPS6113952U
JPS6113952U JP9825784U JP9825784U JPS6113952U JP S6113952 U JPS6113952 U JP S6113952U JP 9825784 U JP9825784 U JP 9825784U JP 9825784 U JP9825784 U JP 9825784U JP S6113952 U JPS6113952 U JP S6113952U
Authority
JP
Japan
Prior art keywords
lead frame
semiconductor devices
gate
cavity
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9825784U
Other languages
Japanese (ja)
Inventor
芳太郎 家本
Original Assignee
ロ−ム株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ロ−ム株式会社 filed Critical ロ−ム株式会社
Priority to JP9825784U priority Critical patent/JPS6113952U/en
Publication of JPS6113952U publication Critical patent/JPS6113952U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は仮想的に示すモールド型とともに示す平面図、
第２図は第１図に示す従来例のモールド状態を示す拡大
断面図、第３図は本考案の一例を仮想的に示すモールド
型とともに示す平面図、第４図は第３図に示す例のモー
ルド状態を示す拡大断面図、第５図は他の実施例を示す
平面図である。FIG. 1 is a plan view showing a hypothetical mold type;
FIG. 2 is an enlarged sectional view showing the state of the mold of the conventional example shown in FIG. 1, FIG. 3 is a plan view showing an example of the present invention together with a hypothetical mold, and FIG. 4 is the example shown in FIG. 3. FIG. 5 is an enlarged cross-sectional view showing the molded state of FIG. 5, and FIG. 5 is a plan view showing another embodiment.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 樹脂モールド法によりパッケージが形成される半導体装
置のリードフレームにおいて、その外枠に、このリード
フレームと対応するモールド型のランナとモールド型の
キャビテイとを連通しうる切り欠きを設け、この切り欠
きをゲートとしてここからキャビテイ内へ樹脂を充填す
るようにしたことを特徴とする、半導体装置用リードフ
レーIn a lead frame for a semiconductor device whose package is formed by a resin molding method, a notch is provided in the outer frame of the lead frame to allow communication between the lead frame, the corresponding mold runner, and the mold cavity. A lead frame for semiconductor devices, characterized in that resin is filled into the cavity from the gate as a gate.
JP9825784U 1984-06-28 1984-06-28 Lead frame for semiconductor devices Pending JPS6113952U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9825784U JPS6113952U (en) 1984-06-28 1984-06-28 Lead frame for semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9825784U JPS6113952U (en) 1984-06-28 1984-06-28 Lead frame for semiconductor devices

Publications (1)

Publication Number Publication Date
JPS6113952U true JPS6113952U (en) 1986-01-27

Family

ID=30657807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9825784U Pending JPS6113952U (en) 1984-06-28 1984-06-28 Lead frame for semiconductor devices

Country Status (1)

Country Link
JP (1) JPS6113952U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08335599A (en) * 1996-07-22 1996-12-17 Hitachi Ltd Manufacture of semiconductor device
JP2015138943A (en) * 2014-01-24 2015-07-30 株式会社カネカ Lead frame for optical semiconductor, resin molding for optical semiconductor and manufacturing method therefor, optical semiconductor package and optical semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08335599A (en) * 1996-07-22 1996-12-17 Hitachi Ltd Manufacture of semiconductor device
JP2015138943A (en) * 2014-01-24 2015-07-30 株式会社カネカ Lead frame for optical semiconductor, resin molding for optical semiconductor and manufacturing method therefor, optical semiconductor package and optical semiconductor device

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