JPS6360312U - - Google Patents

Info

Publication number
JPS6360312U
JPS6360312U JP15225186U JP15225186U JPS6360312U JP S6360312 U JPS6360312 U JP S6360312U JP 15225186 U JP15225186 U JP 15225186U JP 15225186 U JP15225186 U JP 15225186U JP S6360312 U JPS6360312 U JP S6360312U
Authority
JP
Japan
Prior art keywords
mold
resin
width
upper mold
lower mold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15225186U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15225186U priority Critical patent/JPS6360312U/ja
Publication of JPS6360312U publication Critical patent/JPS6360312U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図aは本考案の一実施例の構造を示す断面
図、第1図bは本考案の金型で製作した半導体装
置の外観図、第2図aは従来技術による金型の構
造の一例を示す断面図、第2図bは従来の金型で
製作した半導体装置の外観図である。 1……上型キヤビテイブロツク、2……下型キ
ヤビテイブロツク、3……リードフレーム、4…
…電導細線、5……ペレツト、6……上型キヤビ
テイ部、7……下型キヤビテイ部。
FIG. 1a is a sectional view showing the structure of an embodiment of the present invention, FIG. 1b is an external view of a semiconductor device manufactured using the mold of the present invention, and FIG. 2a is the structure of a mold according to the prior art. A cross-sectional view showing one example, FIG. 2b, is an external view of a semiconductor device manufactured using a conventional mold. 1...Upper cavity block, 2...Lower cavity block, 3...Lead frame, 4...
...Thin conductive wire, 5...Pellet, 6...Upper mold cavity part, 7...Lower mold cavity part.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ペレツトマウントとワイヤーボンデイングを施
したリードフレームを上下から挾み込んで構成す
る空間部に樹脂を注入し半導体を樹脂封止する金
型において、上型と下型を分けるパーテイングラ
インをさかいに上型と下型との前記空間部の巾寸
法に寸法差を設けたことを特徴とする樹脂封示用
金型。
In a mold that seals a semiconductor with resin by injecting resin into the space formed by sandwiching a lead frame with pellet mount and wire bonding from above and below, the parting line that separates the upper mold and lower mold is used. A mold for resin sealing, characterized in that the width of the space between the upper mold and the lower mold is different in width.
JP15225186U 1986-10-02 1986-10-02 Pending JPS6360312U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15225186U JPS6360312U (en) 1986-10-02 1986-10-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15225186U JPS6360312U (en) 1986-10-02 1986-10-02

Publications (1)

Publication Number Publication Date
JPS6360312U true JPS6360312U (en) 1988-04-21

Family

ID=31070060

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15225186U Pending JPS6360312U (en) 1986-10-02 1986-10-02

Country Status (1)

Country Link
JP (1) JPS6360312U (en)

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