JPS61123554U - - Google Patents

Info

Publication number
JPS61123554U
JPS61123554U JP584485U JP584485U JPS61123554U JP S61123554 U JPS61123554 U JP S61123554U JP 584485 U JP584485 U JP 584485U JP 584485 U JP584485 U JP 584485U JP S61123554 U JPS61123554 U JP S61123554U
Authority
JP
Japan
Prior art keywords
light emitting
diode array
emitting diode
optical
silicone resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP584485U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP584485U priority Critical patent/JPS61123554U/ja
Publication of JPS61123554U publication Critical patent/JPS61123554U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Description

【図面の簡単な説明】
第１図は本考案実施例の光プリンタ用発光ダイ
オードアレイを用いた光プリンタヘツドの要部平
面図、第２図は光プリンタヘツドの斜視図である
。 １…（化合物半導体の）基板、２，２…発光領
域、３，３…電極、４…ヘツド基板、５，５…駆
動素子、６，６…ワイヤボンド線、７，７…パタ
ーン配線、８，８…抵抗体、９，９…シリコン樹
脂。

Claims (1)

  1. 【実用新案登録請求の範囲】 (1) 主面に整列して備けられた複数の発光領域
    と、光量の少ない発光領域の上に滴下付着された
    シリコン樹脂とを具備した事を特徴とする光プリ
    ンタ用発光ダイオードアレイ。 (2) 前記発光領域の光放出面は略円形をなして
    いる事を特徴とする前記実用新案登録請求の範囲
    第１項記載の光プリンタ用発光ダイオードアレイ
    。
JP584485U 1985-01-19 1985-01-19 Pending JPS61123554U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP584485U JPS61123554U (ja) 1985-01-19 1985-01-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP584485U JPS61123554U (ja) 1985-01-19 1985-01-19

Publications (1)

Publication Number Publication Date
JPS61123554U true JPS61123554U (ja) 1986-08-04

Family

ID=30482732

Family Applications (1)

Application Number Title Priority Date Filing Date
JP584485U Pending JPS61123554U (ja) 1985-01-19 1985-01-19

Country Status (1)

Country Link
JP (1) JPS61123554U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07231120A (ja) * 1994-02-18 1995-08-29 Rohm Co Ltd 発光装置とその製造方法およびｌｅｄヘッドの製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07231120A (ja) * 1994-02-18 1995-08-29 Rohm Co Ltd 発光装置とその製造方法およびｌｅｄヘッドの製造方法

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