JPS6112288B2 - - Google Patents

Info

Publication number
JPS6112288B2
JPS6112288B2 JP54116830A JP11683079A JPS6112288B2 JP S6112288 B2 JPS6112288 B2 JP S6112288B2 JP 54116830 A JP54116830 A JP 54116830A JP 11683079 A JP11683079 A JP 11683079A JP S6112288 B2 JPS6112288 B2 JP S6112288B2
Authority
JP
Japan
Prior art keywords
address
register
control
signal
control word
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54116830A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5556270A (en
Inventor
Maikeru Kainzesu Dagurasu
Robaato Mitsucheru Guren
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5556270A publication Critical patent/JPS5556270A/ja
Publication of JPS6112288B2 publication Critical patent/JPS6112288B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System (AREA)
JP11683079A 1978-10-23 1979-09-13 Access control circuit Granted JPS5556270A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/953,667 US4236205A (en) 1978-10-23 1978-10-23 Access-time reduction control circuit and process for digital storage devices

Publications (2)

Publication Number Publication Date
JPS5556270A JPS5556270A (en) 1980-04-24
JPS6112288B2 true JPS6112288B2 (forum.php) 1986-04-07

Family

ID=25494364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11683079A Granted JPS5556270A (en) 1978-10-23 1979-09-13 Access control circuit

Country Status (5)

Country Link
US (1) US4236205A (forum.php)
EP (1) EP0010196B1 (forum.php)
JP (1) JPS5556270A (forum.php)
BR (1) BR7906841A (forum.php)
DE (1) DE2964293D1 (forum.php)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57166649A (en) * 1981-03-30 1982-10-14 Ibm Data processing system
US4541045A (en) * 1981-09-21 1985-09-10 Racal-Milgo, Inc. Microprocessor architecture employing efficient operand and instruction addressing
US4701937A (en) * 1985-05-13 1987-10-20 Industrial Technology Research Institute Republic Of China Signal storage and replay system
GB2188759B (en) * 1986-04-05 1990-09-05 Burr Brown Ltd Data processing with op code early comparison
JPH04143819A (ja) 1989-12-15 1992-05-18 Hitachi Ltd 消費電力制御方法、半導体集積回路装置およびマイクロプロセツサ
US5210838A (en) * 1990-05-15 1993-05-11 Sun Microsystems, Inc. Method and apparatus for predicting the effective addresses of future memory load operations in a microprocessor
US5568631A (en) * 1994-05-05 1996-10-22 International Business Machines Corporation Multiprocessor system with a shared control store accessed with predicted addresses
US5919256A (en) * 1996-03-26 1999-07-06 Advanced Micro Devices, Inc. Operand cache addressed by the instruction address for reducing latency of read instruction
US6442645B1 (en) * 1998-12-04 2002-08-27 Intel Corporation Pre-decode conditional command generation for reduced SDRAM cycle latency
FR2823874B1 (fr) * 2001-04-20 2003-10-31 St Microelectronics Sa Procede d'adressage de memoire optimise
JP2003338200A (ja) * 2002-05-17 2003-11-28 Mitsubishi Electric Corp 半導体集積回路装置
JP4761797B2 (ja) * 2005-03-14 2011-08-31 矢崎総業株式会社 ワイヤハーネスの製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7102289A (forum.php) * 1971-02-20 1972-08-22
US3728686A (en) * 1971-06-07 1973-04-17 Rca Corp Computer memory with improved next word accessing
JPS549456B2 (forum.php) * 1972-07-05 1979-04-24
US3898624A (en) * 1973-06-14 1975-08-05 Amdahl Corp Data processing system with variable prefetch and replacement algorithms
US3900835A (en) * 1973-09-24 1975-08-19 Digital Equipment Corp Branching circuit for microprogram controlled central processor unit
US4025771A (en) * 1974-03-25 1977-05-24 Hughes Aircraft Company Pipe line high speed signal processor
JPS605978B2 (ja) * 1974-09-12 1985-02-15 富士通株式会社 記憶装置のアクセス制御方式
US4050094A (en) * 1976-04-30 1977-09-20 International Business Machines Corporation Translator lookahead controls

Also Published As

Publication number Publication date
EP0010196B1 (en) 1982-12-15
EP0010196A1 (en) 1980-04-30
US4236205A (en) 1980-11-25
DE2964293D1 (en) 1983-01-20
BR7906841A (pt) 1980-09-16
JPS5556270A (en) 1980-04-24

Similar Documents

Publication Publication Date Title
US4430706A (en) Branch prediction apparatus and method for a data processing system
US4896259A (en) Apparatus for storing modifying data prior to selectively storing data to be modified into a register
US5235686A (en) Computer system having mixed macrocode and microcode
US4574349A (en) Apparatus for addressing a larger number of instruction addressable central processor registers than can be identified by a program instruction
JP2539199B2 (ja) デジタルプロセッサ制御装置
US5287465A (en) Parallel processing apparatus and method capable of switching parallel and successive processing modes
US3792441A (en) Micro-program having an overlay micro-instruction
EP0134620B1 (en) Data processing apparatus and method
US3983539A (en) Polymorphic programmable units employing plural levels of sub-instruction sets
EP0057788B1 (en) Data processing system with external microcode control unit
US3983541A (en) Polymorphic programmable units employing plural levels of phased sub-instruction sets
EP0124597B1 (en) Multiple control stores in a pipelined microcontroller for handling jump and return subroutines
US4558411A (en) Polymorphic programmable units employing plural levels of sub-instruction sets
US4305124A (en) Pipelined computer
US4077060A (en) Asymmetrical multiprocessor system
JPS5831014B2 (ja) 命令先取り装置
US3949372A (en) System for extending the interior decor of a microprogrammed computer
JPS6322336B2 (forum.php)
JPS6112288B2 (forum.php)
JP2840604B2 (ja) マイクロコード式ｃｐｕで実行される命令用のオペランドを指定する方法および装置
US4320454A (en) Apparatus and method for operand fetch control
US4258417A (en) System for interfacing between main store memory and a central processor
CA1126406A (en) Sequence control circuit for a computer
US5247624A (en) Microprogram controller including leading microinstruction from a generator executed while succeeding microinstruction from memory is read out
US4635188A (en) Means for fast instruction decoding for a computer