JPS61122743A - フアイル装置選択方式 - Google Patents
フアイル装置選択方式Info
- Publication number
- JPS61122743A JPS61122743A JP59244747A JP24474784A JPS61122743A JP S61122743 A JPS61122743 A JP S61122743A JP 59244747 A JP59244747 A JP 59244747A JP 24474784 A JP24474784 A JP 24474784A JP S61122743 A JPS61122743 A JP S61122743A
- Authority
- JP
- Japan
- Prior art keywords
- file
- address
- instruction
- bus
- signal line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015654 memory Effects 0.000 claims abstract description 19
- 238000010187 selection method Methods 0.000 claims description 9
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000009434 installation Methods 0.000 description 3
- 238000011084 recovery Methods 0.000 description 1
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59244747A JPS61122743A (ja) | 1984-11-20 | 1984-11-20 | フアイル装置選択方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59244747A JPS61122743A (ja) | 1984-11-20 | 1984-11-20 | フアイル装置選択方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61122743A true JPS61122743A (ja) | 1986-06-10 |
JPH0359454B2 JPH0359454B2 (enrdf_load_stackoverflow) | 1991-09-10 |
Family
ID=17123289
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59244747A Granted JPS61122743A (ja) | 1984-11-20 | 1984-11-20 | フアイル装置選択方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61122743A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8914615B2 (en) | 2011-12-02 | 2014-12-16 | Arm Limited | Mapping same logical register specifier for different instruction sets with divergent association to architectural register file using common address format |
-
1984
- 1984-11-20 JP JP59244747A patent/JPS61122743A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8914615B2 (en) | 2011-12-02 | 2014-12-16 | Arm Limited | Mapping same logical register specifier for different instruction sets with divergent association to architectural register file using common address format |
Also Published As
Publication number | Publication date |
---|---|
JPH0359454B2 (enrdf_load_stackoverflow) | 1991-09-10 |
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