JPS61121753U - - Google Patents
Info
- Publication number
- JPS61121753U JPS61121753U JP408485U JP408485U JPS61121753U JP S61121753 U JPS61121753 U JP S61121753U JP 408485 U JP408485 U JP 408485U JP 408485 U JP408485 U JP 408485U JP S61121753 U JPS61121753 U JP S61121753U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- pad
- semiconductor device
- power supply
- formation region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Wire Bonding (AREA)
Description
第１図Ａ，Ｂは本考案の実施例の半導体装置の
平面図と電圧特性を示すグラフ図、第２図Ａ，Ｂ
は従来の半導体装置の平面図と電圧特性を示すグ
ラフ図、第３図は本考案の実施例の半導体装置の
平面図である。
１，１１，２１……半導体チツプ、２，１３，
１４，２６，２７，２８……素子形成領域、３，
１２，２２……電源パツド（ボンデイングパツド
）、ΔＶ……電圧降下、２９……信号用パツド。
Figures 1A and B are a plan view and graphs showing voltage characteristics of a semiconductor device according to an embodiment of the present invention, and Figures 2A and B are graphs showing voltage characteristics.
3 is a plan view of a conventional semiconductor device and a graph showing voltage characteristics, and FIG. 3 is a plan view of a semiconductor device according to an embodiment of the present invention. 1, 11, 21... semiconductor chip, 2, 13,
14, 26, 27, 28...element formation region, 3,
12, 22... Power supply pad (bonding pad), ΔV... Voltage drop, 29... Signal pad.
Claims (1)
装置において、該半導体チツプの外周部に信号パ
ツドを配置し、該半導体チツプの素子形成領域の
内部に電源パツドを配置したことを特徴とする半
導体装置。 1. A semiconductor device comprising an integrated circuit formed on a semiconductor chip, characterized in that a signal pad is arranged on the outer periphery of the semiconductor chip, and a power supply pad is arranged inside an element formation region of the semiconductor chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP408485U JPS61121753U (en) | 1985-01-18 | 1985-01-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP408485U JPS61121753U (en) | 1985-01-18 | 1985-01-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61121753U true JPS61121753U (en) | 1986-07-31 |
Family
ID=30479314
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP408485U Pending JPS61121753U (en) | 1985-01-18 | 1985-01-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61121753U (en) |
-
1985
- 1985-01-18 JP JP408485U patent/JPS61121753U/ja active Pending