JPS63119258U - - Google Patents

Info

Publication number
JPS63119258U
JPS63119258U JP1104287U JP1104287U JPS63119258U JP S63119258 U JPS63119258 U JP S63119258U JP 1104287 U JP1104287 U JP 1104287U JP 1104287 U JP1104287 U JP 1104287U JP S63119258 U JPS63119258 U JP S63119258U
Authority
JP
Japan
Prior art keywords
chip
bonding pad
wire bonding
base
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1104287U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1104287U priority Critical patent/JPS63119258U/ja
Publication of JPS63119258U publication Critical patent/JPS63119258U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Fuses (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a,bは本考案の実施例1のチツプ外観
図回路図、第2図a,bは実施例2のチツプ外観
図回路図、第3図a,bは従来のトランジスタの
チツプ外観図回路図である。 1……チツプ本体(コレクタ)、2……ベース
層、3……ベースワイヤボンデイングパツド、4
……エミツタワイヤボンデイングパツド、5……
エミツタ層、6……ヒユーズ、7……酸化膜、8
……チツプ本体(コレクタ)、9……ベース層、
10……エミツタ層、11……エミツタワイヤボ
ンデイングパツト、12……酸化膜(エミツタ)
、13……酸化膜(ベース)、14……ヒユーズ
、15……ベースワイヤボンデイングパツト、1
6……ベースワイヤボンデイングパツト、17…
…エミツタワイヤボンデイングパツト、18……
チツプ本体(コレクタ)、19……ベース層、2
0……エミツタ層。
Figures 1a and b are external views and circuit diagrams of a chip according to Embodiment 1 of the present invention, Figures 2a and b are external views and circuit diagrams of a chip according to Embodiment 2, and Figures 3a and b are external views of a conventional transistor chip. FIG. 1... Chip body (collector), 2... Base layer, 3... Base wire bonding pad, 4
...Emitsuta wire bonding pad, 5...
Emitter layer, 6... Fuse, 7... Oxide film, 8
... Chip body (collector), 9 ... Base layer,
10... Emitter layer, 11... Emitter wire bonding pad, 12... Oxide film (emitter)
, 13...Oxide film (base), 14...Fuse, 15...Base wire bonding pad, 1
6...Base wire bonding pad, 17...
...Emitsuta wire bonding pad, 18...
Chip body (collector), 19...Base layer, 2
0...Emitsuta layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 従来のトランジスタ素子においてチツプ上に形
成したヒユーズを特徴とするトランジスタ。
A transistor characterized by a fuse formed on a chip in a conventional transistor element.
JP1104287U 1987-01-27 1987-01-27 Pending JPS63119258U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1104287U JPS63119258U (en) 1987-01-27 1987-01-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1104287U JPS63119258U (en) 1987-01-27 1987-01-27

Publications (1)

Publication Number Publication Date
JPS63119258U true JPS63119258U (en) 1988-08-02

Family

ID=30797901

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1104287U Pending JPS63119258U (en) 1987-01-27 1987-01-27

Country Status (1)

Country Link
JP (1) JPS63119258U (en)

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