JPS6094791A - Printed circuit board - Google Patents
Printed circuit boardInfo
- Publication number
- JPS6094791A JPS6094791A JP20231383A JP20231383A JPS6094791A JP S6094791 A JPS6094791 A JP S6094791A JP 20231383 A JP20231383 A JP 20231383A JP 20231383 A JP20231383 A JP 20231383A JP S6094791 A JPS6094791 A JP S6094791A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- lands
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、フラットパッケージ（ＦＰ）型■Ｃのリード
が挿着される印刷配線板のランドの配置を改良した印刷
配線板に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a printed wiring board in which the land arrangement of the printed wiring board into which leads of a flat package (FP) type ■C are inserted is improved.
〔発明の技術的背景及とひその問題点〕従来、ＦＰ型Ｉ
Ｃを搭載した印刷配線板としでは、第１図（ａ）、（ｂ
）に示すものが知られている。[Technical background of the invention and its problems] Conventionally, FP type I
As for printed wiring boards equipped with C, Figures 1 (a) and (b)
) are known.
図中の１は、絶縁性の印刷配線基板である。この基板１
上には、ＦＰ型ＩＣのリードが半田付けされる巾０．５
鶴の導電・母ターン２・・・が複数個２列に形成されて
いる。なお、導′屯ツクターン２゜２間のピッチ（ｄ）
は１．２７７Ｍである。また、前記基板１上には、図示
しないが複数の配線／４’ターンが形成されている。1 in the figure is an insulating printed wiring board. This board 1
On the top, there is a width of 0.5 to which the FP type IC leads are soldered.
A plurality of conductive/mother turns 2 of cranes are formed in two rows. In addition, the pitch (d) between the two conductor turns 2゜2
is 1.277M. Further, although not shown, a plurality of wiring lines/4' turns are formed on the substrate 1.
こうした構造の印刷配線板にＦ’Ｐ型ＩＣを搭載すると
きは、ＦＩ’型ＩＣ３のリード４・・・を印刷配線基板
１上の＃電・やターン２・・・に夫々半田付けして固定
することにより行なう。なお、同図（ｂｌにおいて、リ
ード４の図示を省略している。When mounting an F'P type IC on a printed wiring board with such a structure, solder the leads 4 of the FI' type IC 3 to the # terminals and turns 2 on the printed wiring board 1, respectively. This is done by fixing it. In addition, in the same figure (bl), illustration of the lead 4 is omitted.
しかしながら、前述した印刷配線板によれば、以下に示
す欠点を有していた。However, the above-described printed wiring board had the following drawbacks.
■ リード４・・・を導電パターン２・・・に接続する
ための半田付は工数を必要とし、作業性の低下をもたら
す。■ Soldering for connecting the leads 4 to the conductive patterns 2 requires a lot of man-hours, resulting in a decrease in work efficiency.
■ 導体）ぐターン２．２のピッチ＋（＋１カ１．２７
鶴と小さいため、半田付けの際ブリッジが発生する。ま
た、同様の理由から、導体）Ｊ？ターン２・・・間に配
線を走らせることができず、速い回路動作を必要とする
機種には適さないとともに、高密度設計品には不向きで
ある。■ Pitch of conductor) turn 2.2 + (+1 force 1.27
Due to its small size, bridges occur during soldering. Also, for the same reason, conductor) J? Turn 2: It is not possible to run wiring between turns, making it unsuitable for models that require fast circuit operation, and also unsuitable for high-density designed products.
このようなことから、第２図（ａ）、（ｂｌに示すよう
な印刷配線板が提案されている。この印刷配線板は、印
刷配線基板１にＦＴ’型■Ｃ３のＩＪ−ド４・・・を挿
着丁べきランド５・・・を千鳥状に近接して設けられて
いる。これらランド５・・・の大きさは１．４０又は１
．４φであり、最も近接する２ケのランド５．５間の列
方向の距離（ｄ、）は１．２７ｉｆｌで、列方向に直交
する方向の距離（ｄりは１．２７Ｍである。また、ｔ’
＋ｉＪ ！ｉ；基板１上には、配線パターン６・・・が
設けられている。しかるに、第２図の印刷配線板によれ
ば、印刷配線基板２にランド５・・・が千鳥状に設けら
れているため、前述した半田付の工数及び半田付けの際
のブリッジの問題点を解消できる。しかしながら、ラン
ド５・・・間に配線ツヤターン６・・・を走らすには至
らず、速い動作回路を必要とする機種に適さないととも
に、高密度設計には不向きである。For this reason, a printed wiring board as shown in FIGS. Lands 5 for inserting... are provided close to each other in a staggered manner.The size of these lands 5 is 1.40 or 1.
．． 4φ, the distance (d,) in the column direction between the two closest lands 5.5 is 1.27ifl, and the distance in the direction perpendicular to the column direction (d is 1.27M. t'
+iJ! i; Wiring patterns 6 are provided on the substrate 1. However, according to the printed wiring board shown in FIG. 2, the lands 5 are provided in a staggered manner on the printed wiring board 2, so that the above-mentioned man-hours for soldering and problems with bridges during soldering can be avoided. It can be resolved. However, it is not possible to run the wiring glossy turns 6 between the lands 5, so that it is not suitable for a model that requires a fast operating circuit, and is not suitable for high-density design.
本発明は上記事情に鑑みてなされたもので、半田付の工
数、ブリッジの問題点を解消することは勿論のこと、速
い動作回路を要する機種にも適しかつ高密度設計をなし
得る印刷配線板を提供することを目的とするものである
。The present invention has been made in view of the above circumstances, and it not only solves the problems of soldering man-hours and bridges, but also enables a printed wiring board that is suitable for models that require fast operating circuits and can be designed with high density. The purpose is to provide the following.
本発明は、ランドを印刷配線基板に千鳥状でかつ夫々の
間隔が配線パターン間隔より大きく設けることによって
、前述した目的を達成することを骨子とするものである
。The gist of the present invention is to achieve the above-mentioned object by providing lands on a printed wiring board in a staggered manner and at intervals larger than the intervals between wiring patterns.
以下、本発明の一実施例を第３図（ａ）、（ｂ）を参照
して説明する。 ′
図中の１１は、絶縁性の印刷配線基板である。An embodiment of the present invention will be described below with reference to FIGS. 3(a) and 3(b). ' 11 in the figure is an insulating printed wiring board.
この基板１１には、ＦＰ型ＩＣ１２のリード１３・・・
を挿着するための複数のランド１４・・・が千鳥状に設
けられている。これらランド１４・・・の径は、例えば
１４０又は１．４φである。また、最も近接する２ケの
ランド１４．１４の列方向の間隔（Ｄ、）は２．５４Ｍ
であり、列方向と直交する方向の間隔（Ｄ、）は１．２
７７−である。This board 11 has leads 13 of the FP type IC 12...
A plurality of lands 14 for inserting and attaching are provided in a staggered manner. The diameter of these lands 14 is, for example, 140 or 1.4φ. Also, the spacing (D,) in the column direction of the two closest lands 14.14 is 2.54M.
and the interval (D,) in the direction perpendicular to the column direction is 1.2
It is 77-.
前記基板１１・・・上には、中０．５ ａｍの配線パタ
ーン１５・・・が前記ランド１４・・・間を止るように
形成されている。On the substrate 11, a wiring pattern 15 with a diameter of 0.5 am is formed so as to stop between the lands 14.
しかして、本発明によれば、ランド１４・・・が印刷配
線基板１１に千鳥状でかつ夫々の間隔が配線パターン１
５・・・の幅より大きくなるように設けられているため
、ランド１４・・・間にも配線パターン１５・・・を走
らせることができる。従って、左側から右側あるいはこ
の逆へのノＲターンを短距離で走らせることができ、も
ってスピードを必要とする機種に適すとともに、高密度
設計も可能となる。According to the present invention, the lands 14 are arranged in a staggered manner on the printed wiring board 11, and the intervals between the lands 14 are the same as that of the wiring pattern 1.
Since the width of the lands 14 is larger than the width of the lands 14, the wiring patterns 15 can be run between the lands 14. Therefore, it is possible to run a R-turn from the left side to the right side or vice versa in a short distance, making it suitable for models that require speed and also enabling high-density design.
また、前記と同様の理由から半Ｉｌｌ付けの工数を第１
図の印刷配線板と比べ減少して作業性を向上でき、かつ
半田付けの際のブリッジの発生を阻止することは勿論の
ことである。Also, for the same reason as above, the number of man-hours for half-Ill attachment is
It goes without saying that the number is reduced compared to the printed wiring board shown in the figure, improving workability and preventing the occurrence of bridges during soldering.
以上詳述した如く、本発明によれば、作業性を向上する
とともにブリッジの発生を防止し、更にスピードを要す
る機種に適しかつ高密度設計をなし得る印刷配線板を提
供できるものである。As described in detail above, according to the present invention, it is possible to provide a printed wiring board that improves workability, prevents the occurrence of bridges, is suitable for models that require speed, and is capable of high-density design.
第１図（ａ）は従来の印刷配線板の正面図、同図（ｂ）
は同図（ａ）の平面図、第２図（ａｌは従来の改良され
た印刷配線板の正面図、同図（ｂ）は同図（ａ）の平面
図、第３図（ａｌは本発明の一実施例に係る印刷配線板
の正面図、同図（ｂ）は同図（ａｌの平面図である。
Ｊｌ・・・印刷配線基板、１２・・・ＦＰ型ＩＣ１１３
゛°°リード、１４°°°ランド、１５・・・配線）ぐ
ターン。
出願人代理人 弁理士 鈴 圧式 彦
第１図
３
（ａ）
第２１ツ１
】
３１閃
２Figure 1 (a) is a front view of a conventional printed wiring board, and Figure 1 (b) is a front view of a conventional printed wiring board.
are the plan views of figure (a), figure 2 (al is the front view of the conventional improved printed wiring board, figure (b) is the plane view of figure (a), A front view of a printed wiring board according to an embodiment of the invention, FIG.
゛°°lead, 14°°land, 15... wiring) turn. Applicant's agent Patent attorney Hiko Rin Ushiki Figure 1 3 (a) 21st 1 ] 31 Sen 2
Claims (1)
この基板に設けられた前記ＩＣのリードを挿着するラン
ドと、同基板上に設けられた配線・ぐターンとを具備す
る印刷配線板において、ランドが千鳥状でかつ夫々の間
隔が配線ノ４ターンの幅より太き、く設けられているこ
とを特徴とする印刷配線板。A printed wiring board equipped with a flat package IC,
In this printed wiring board, the lands are provided in a staggered pattern and the intervals between the lands are 4 times the width of the wiring. A printed wiring board characterized in that the turns are thicker and wider than the width of the turns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20231383A JPS6094791A (en) | 1983-10-28 | 1983-10-28 | Printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20231383A JPS6094791A (en) | 1983-10-28 | 1983-10-28 | Printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6094791A true JPS6094791A (en) | 1985-05-27 |
Family
ID=16455474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20231383A Pending JPS6094791A (en) | 1983-10-28 | 1983-10-28 | Printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6094791A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02241084A (en) * | 1989-03-15 | 1990-09-25 | Matsushita Electric Ind Co Ltd | Electronic part mounting process and electronic part |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5110765A (en) * | 1974-07-16 | 1976-01-28 | Canon Kk | SHUSEKI KAIROBUHIN |
| JPS5810359B2 (en) * | 1979-03-23 | 1983-02-25 | 西原 忠 | Automatic anti-reverse braking device for winch winding drum |
| JPS5942050B2 (en) * | 1981-03-31 | 1984-10-12 | 株式会社豊田中央研究所 | Cooling method during solution heat treatment of stainless steel materials |
-
1983
- 1983-10-28 JP JP20231383A patent/JPS6094791A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5110765A (en) * | 1974-07-16 | 1976-01-28 | Canon Kk | SHUSEKI KAIROBUHIN |
| JPS5810359B2 (en) * | 1979-03-23 | 1983-02-25 | 西原 忠 | Automatic anti-reverse braking device for winch winding drum |
| JPS5942050B2 (en) * | 1981-03-31 | 1984-10-12 | 株式会社豊田中央研究所 | Cooling method during solution heat treatment of stainless steel materials |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02241084A (en) * | 1989-03-15 | 1990-09-25 | Matsushita Electric Ind Co Ltd | Electronic part mounting process and electronic part |
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