JPS6074323U - multiple output amplifier - Google Patents
multiple output amplifierInfo
- Publication number
- JPS6074323U JPS6074323U JP16537983U JP16537983U JPS6074323U JP S6074323 U JPS6074323 U JP S6074323U JP 16537983 U JP16537983 U JP 16537983U JP 16537983 U JP16537983 U JP 16537983U JP S6074323 U JPS6074323 U JP S6074323U
- Authority
- JP
- Japan
- Prior art keywords
- output amplifier
- power supply
- supply voltage
- whose
- transistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の複数出力増幅器の概略構成図、第２図は
本考案の複数出力増幅器の一実施例に係る構成図、第３
図は差動増幅器の構成図、第４図、第５図、第６図は本
考案の他の実施例に係る複数出力増幅器の構成図である
。
Ｓｌ・・・・・・信号源、１１・・・・・・電流源、■
１．■２・・・・・・電源電圧、Ｑ（、Ｑ１〜Ｑｎ・・
・・・・トランジスタ、Ｒｏｔ Ｒ□〜Ｒｎ・・・・・
・抵抗、Ｏ□〜Ｏｎ・・・・・・出力端子、ＲＦ、□〜
ＲＥ２−・・・・・抵抗、Ｑ□〜Ｑｎ・・・・・・トラ
ンジスタ、Ｒ□〜Ｒｎ・・・・・・抵抗、０□〜Ｏｎ・
・・・・・出力端子。FIG. 1 is a schematic configuration diagram of a conventional multiple output amplifier, FIG. 2 is a configuration diagram of an embodiment of the multiple output amplifier of the present invention, and FIG.
This figure is a block diagram of a differential amplifier, and FIGS. 4, 5, and 6 are block diagrams of multiple output amplifiers according to other embodiments of the present invention. Sl...Signal source, 11...Current source,■
1. ■2...Power supply voltage, Q(, Q1~Qn...
...Transistor, Rot R□~Rn...
・Resistance, O□~On... Output terminal, RF, □~
RE2-・・・Resistance, Q□～Qn・・・Transistor, R□～Rn・・・Resistance, 0□～On・
...Output terminal.
Claims (3)
て第１の電源電圧に、ベースが信号源にそれぞれ接続さ
れるトランジスタと、このトランジスタに対し各々差動
増幅器を構成する如くエミッタが前記トランジスタのエ
ミッタに、コレクタが各々第１から第ｎ （ｎ≧２）の
抵抗をそれぞれ介して前記第１の電源電圧に、ベース相
互が第２の電源電圧＆Ｈそれぞれ共通接続されるｎ個の
トランジスタとを有し、前記第１からｎめ抵抗の値を相
互に異ならせて設定することにより、前記ｎ個のトラン
ジスタの各々のコレクタより相意なる増幅出力を得るこ
とを特徴とする複数出力増幅器。(1) A transistor whose emitter is connected to a current source, whose collector is connected to a first power supply voltage via a resistor, and whose base is connected to a signal source; n transistors whose collectors are commonly connected to the first power supply voltage through the first to nth (n≧2) resistors, and whose bases are commonly connected to the second power supply voltage &H, respectively; A multi-output amplifier, characterized in that by setting the values of the first to n-th resistors to be different from each other, mutually different amplified outputs are obtained from the collectors of each of the n transistors.
ッタは各々抵抗を介して共通接続されることを特徴とす
る実用新案登録請求の範囲第１項記載の複数出力増幅器
。(2) The multi-output amplifier according to claim 1, wherein the transistor and the emitters of the n transistors are each commonly connected via a resistor.
とを特徴とする実用新案登録請求の範囲第１項記載の複
数出力増幅器。(3) The multi-output amplifier according to claim 1, wherein the second power supply voltage is an inverted output of a signal source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16537983U JPS6074323U (en) | 1983-10-27 | 1983-10-27 | multiple output amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16537983U JPS6074323U (en) | 1983-10-27 | 1983-10-27 | multiple output amplifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6074323U true JPS6074323U (en) | 1985-05-24 |
Family
ID=30362339
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16537983U Pending JPS6074323U (en) | 1983-10-27 | 1983-10-27 | multiple output amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6074323U (en) |
-
1983
- 1983-10-27 JP JP16537983U patent/JPS6074323U/en active Pending
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