JPS6051277B2 - Manufacturing method of MOS type semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a MOS type semiconductor device.

A conventional method for manufacturing a silicon gate P-channel MOS type semiconductor device is as follows.

First, as shown in FIG.
ΛSiO. A membrane 2 is provided. Next, a pattern 3 is formed as shown in FIG. 1 by photolithography using a photosensitive resin. The area of this pattern 3 is selected in order to form a gate region and source and drain regions. Next, as shown in FIG.
is formed to a thickness of 500 to 2000Λ. Then, a polycrystalline silicon film 5 is formed on the main surface of the substrate 1 to a thickness of 5000 to 8000 cm, as shown in FIG. 1d, and a mask film 6 is further laminated thereon. The material of this mask film body 6 is appropriately selected depending on the etching method of the polycrystalline silicon film 5. Next, Figure 1 e
The polycrystalline silicon film 5 is etched using the mask film body 6, and unnecessary portions are removed, leaving the polycrystalline silicon film 5 and the mask film body 6 on the gate region. Next, Figure 1 f
The mask film body 6 on the gate region is removed, and the SiO2 film 4 is removed using the remaining polycrystalline silicon film 5 as a mask. Then, by diffusing P-type impurities therein, a source region 7a and a drain region 7b are formed. At this time, the P-type impurity is also diffused into the polycrystalline silicon film 5. Next, a SiO2 film 8 is deposited on the main surface of the substrate 1 at a temperature of 800 to 1000A.
The electrode window 9a in the resource region, the electrode window 9b in the drain region, and the electrode window 10 in the gate region are formed by photolithography as shown in FIG. 1g. Next, an aluminum film of 5000A to 8000A is applied using a sputtering method or the like.
The source electrode 11a, the drain electrode 11b and the gate electrode 12 are formed to a thickness of
form. In this way, a MOS type semiconductor device is manufactured. However, the MOS type semiconductor device manufactured in this way has a large step difference on the element surface.
The drawback was that high density was inhibited. Furthermore, in order to prevent disconnection of the electrodes 11a, 11b, 12 due to the step difference, the thickness of the aluminum film constituting the electrodes 11a, 11b, 12 is increased, resulting in an increase in cost. Therefore, an object of the present invention is to provide a method for manufacturing a MOS type semiconductor device that can achieve high density and is inexpensive. An embodiment of the method for manufacturing a MOS type semiconductor device according to the present invention is shown in FIG.

That is, the N-type semiconductor substrate 2 has a specific resistance of 4 to 5 Ωα.
0 by thermal oxidation method or CVD method.
2 membranes 21 to 2000. Formed to a thickness of ~5000A.
A doped silicon oxide film 22 containing P-type or N-type impurities is further laminated on this SjO2 film 21. The impurities in the doped silicon oxidation are restricted from diffusing into the substrate 20 by the SiO2 film 21. Next, photosensitive trees,
Grease 23 is applied by a spinner method or the like. This photosensitive resin 23 may be either negative type or positive type. Then, a hole 2 is formed in a portion of the photosensitive resin 23 corresponding to the gate region.
4 (Figure 2a). Next, this photosensitive resin 23
Doped silicon oxide film 22, SiO
2 film 21 is etched with a saliva-based etchant, and the substrate 20 is etched with a CF4 plasma atmosphere or an HF-based etchant to form a recess 25 with a depth of 6000 A (from the main surface of the substrate 20).
A gate oxide film 25b is formed in this recess 25a to a thickness of 500 to 2000 Å by thermal oxidation (FIG. 2b). Next, a polycrystalline silicon film 26 is formed to a thickness of 6000 Å.
layered on. As a result, the polycrystalline silicon film 26 enters into the recess 25a and fills the recess 25a (FIG. 2c).
. Then, by performing heat treatment, the impurities in the doped silicon oxide film 22 are diffused into the polycrystalline silicon layer 26 on the main surface of the substrate 20, but are not diffused into the polycrystalline silicon layer 26 in the recess 25a. The polycrystalline silicon layer 26 on the main surface of the substrate 20 can be removed by immersion in an etchant having selectivity depending on the concentration. In addition, the doped silicon oxide film 22 and the SiO2 film 21 are also treated with an HF-based liquid and removed, thereby forming a polycrystalline silicon film 26 buried in the semiconductor substrate 20 and having the SiO2 film 25 of the gate portion around it. (Fig. 2d). Next, a polycrystalline silicon film 27 is again deposited on the main surface of the substrate 20.
000 to 10,000 Å thick, and on top of that, a ``SlO2 film 28 with a thickness of 2,000 to 8,000 Å is formed by, for example, the CVD method.
Form to thickness A. Next, the gate section and source,
A source region 29 and a drain region 30 are formed by making a window in the portion of the SiO2 film 28 corresponding to the drain region by photoetching and diffusing P-type impurities using the SiO2 film 28 as a mask (Fig. 2). e). in this case,
The P-type impurity is also diffused into the portion of the polycrystalline silicon film 27 not covered by the SlO2 film 28 and into the polycrystalline silicon film 26 within the recess 25a, so that the resistivity thereof decreases. Next, the SiO2 film 28 is removed and a silicon nitride film 31 is formed to a thickness of 1000A to 8000A (FIG. 2f), leaving portions of the silicon nitride film 31 corresponding to the source electrode, drain electrode, and gate electrode. Remove unnecessary parts. Then, the remaining silicon nitride films 32a and 32b
, 32c as a mask, the surface of the polycrystalline silicon film 27 is etched to a certain depth (FIG. 2g). Note that the silicon nitride film 31 may be removed using a photosensitive resin, SjO2 film, or polycrystalline silicon film as a mask using an H3PO or etchant, or may be removed in a CF4 plasma atmosphere. Furthermore, since the surface of the polycrystalline silicon film 27 is etched to increase its thickness when it is selectively oxidized in the next step, the film thickness is previously etched to be thinned by the increased thickness. Next, silicon nitride film 32a
32c as a mask, the polycrystalline silicon film 27 not covered with the silicon nitride films 32a to 32c is selectively oxidized and becomes Si.
An O2 film 33 is formed and its film thickness increases. When the silicon nitride films 32a to 32c are then removed, a flat device surface is formed. Next, a polycrystalline silicon film 27a corresponding to the source electrode, drain electrode and gate electrode,
A source electrode 34a, a drain electrode 34b, and a gate electrode 34c are attached to 27b and 27c, respectively. A MOS type semiconductor device is then completed by forming a protective film 35 on the surface of the element (FIG. 2h). Note that the protective film 35 is composed of an SlO2 film formed by the CVD method. As described above, according to this embodiment, since the pattern forming process is performed in a flat state, it is possible to form a fine pattern, and since the element surface is flattened, it is possible to increase the density. .

Furthermore, since the gate portion is formed first and then the source and drain regions are formed, self-aligned diffusion is possible, and the gate portion is buried in the substrate 20, so that the impurity concentration is high near the channel and the breakdown voltage is increased. Therefore, a short channel structure can be achieved. Another embodiment of the manufacturing method of this invention is shown in FIG.

That is, a silicon nitride film 41 with a thickness of 1000 to 8000 A is provided on an N-type semiconductor substrate 40 with a specific resistance of 4 to 5 Ω, and the gate portion, source, and drain regions are formed by photolithography or a plasma atmosphere using CF4. Only the silicon nitride film 41 is left and the rest is removed (FIG. 3a)
). Note that in the above step, when the silicon nitride film 41 is formed by providing an SiO2 film between the silicon nitride film 41 and the semiconductor substrate 40, a step may be provided to remove the strain on the surface of the semiconductor substrate 40. Next, a part of the semiconductor substrate 40 is removed using this silicon nitride film 41 as a mask,
When selective oxidation is performed, the result is as shown in FIG. 3b. The SiO2 film 42 formed by this selective oxidation is a selective mask material for preventing the impurities of the doped oxide film described later from diffusing into the semiconductor substrate 40, so it only needs to have a thickness of 1000 Å to 8000 Å. Then, the silicon nitride film 41 is removed,
A doped silicon oxide film 43 containing impurities is formed to a thickness of 20 mm.
00A to 10000A, and then photosensitive resin 44
When the photosensitive resin 44 is formed with holes 45 and immersed in an HF-based liquid, the doped silicon oxide film 43 is formed into holes 4.
It can be removed to the same size as 5. When this is then treated with an HF-based solution or a CF4 plasma atmosphere, a recess 46 in the semiconductor substrate 40 is formed to a depth of 6500A.
Next, a gate oxide film 47 is formed in the recess 46 to a thickness of 500 to 2000 Å by thermal oxidation (FIG. 3d). Next, when a polycrystalline silicon film 48 is formed with a thickness of 6,500 layers to have the same thickness as the depth of the recess 46, the recess 46 is filled with the polycrystalline silicon film 48 (FIG. 3e). Then, by further applying heat treatment, the impurities in the doped silicon oxide film 43 are diffused into the semiconductor substrate 40, and a source region 49 and a drain region 50 are formed. At this time, since the impurities are also diffused into the polycrystalline silicon layer 48 at the same time, the polycrystalline silicon film 48 on the substrate 40 is
When the polycrystalline silicon film 48 is removed, the polycrystalline silicon film 48 within the recess 46 remains. Thereafter, the doped silicon oxide film 43 is removed and a polycrystalline silicon layer 51 is formed to a thickness of 4000 to 10000 Å (FIG. 3f). On top of that, a silicon nitride film 52 is deposited.
A silicon nitride film 52 is formed with a thickness of 000A to 8000A and corresponds to the source, drain electrode, and gate electrode.
Using these as a mask, the surface of the polycrystalline silicon film 51 is etched to a certain depth, leaving only the portions 52a to 52c (FIG. 3g). In addition, in the step of FIG. 3f, when P-type impurities are diffused over the entire surface after forming the polycrystalline silicon film 51, P-type impurities are also formed in the polycrystalline silicon film 51 and the polycrystalline silicon film 48 in the gate area. is spread.
Next, when the polycrystalline silicon film 51 is selectively oxidized, the parts other than those covered with the silicon nitride films 52a to 52c are
A SiO2 film 53 is formed on all of them. Next, source electrodes 51a, 51b, and 51c are respectively placed on the polycrystalline silicon films 51a, 51b, and 51c corresponding to the source electrode, drain electrode, and gate electrode.
4a1 drain electrode 54b and gate electrode 54c are attached. A MOS type semiconductor device is then completed by forming a protective film 55 on the surface of the element (FIG. 3b). This embodiment also has the same effects as the previous embodiment. Still another embodiment of the manufacturing method of the present invention is shown in FIG. That is, an SlO2 film 61 is provided on a semiconductor substrate 60 with a specific resistance of 4 to 5 ΩCm by thermal oxidation or CVD, windows are formed in the gate portion, source and drain regions by photoetching, and doped silicon oxide containing impurities is formed. A film 62 is formed over the entire surface (FIG. 4a). Next, using the photosensitive resin 63'' as a mask, a hole 64 for a gate portion is provided in the semiconductor substrate 60 (FIG. 4b). Next, this photosensitive resin 63'' is removed and a gate oxide film 65 is formed in the hole 64 with a thickness of 500A to 2000A. (Fig. 4c). and polycrystalline silicon layer 63
When formed and heat-treated, impurities in the doped silicon oxide film 62 are diffused into the semiconductor substrate 60, forming a source region 66 and a drain region 67 (FIG. 4d). At the same time, since the impurity is also diffused into the polycrystalline silicon layer 63, selective etching is performed using the difference in impurity concentration to remove the polycrystalline silicon layer 63 on the doped silicon oxide film 62 and remove the doped silicon layer 63 and the doped silicon layer 63. When the silicon oxide film 62 is removed, the polycrystalline silicon film 63 in the gate portion remains in the hole 64, so that the surface becomes flat. Next, a polycrystalline silicon layer 68 is formed (FIG. 4e), and an SiO2 film 69 is further provided, and a window is opened in the SiO2 film 69 corresponding to the gate, source, and drain regions, and P-type impurities are diffused. Then, impurities are diffused into the polycrystalline silicon layers 63 and 68 (FIG. 4f). Note that the SiO2 film 69 may be formed by thermally oxidizing a portion of the polycrystalline silicon layer 68, or may be provided by a CVD method or the like. Next, the SiO2 film 69 is removed, and silicon nitride films 70a to 70c are selectively formed on the portions of the polycrystalline silicon film 68 corresponding to the source, drain, and gate electrodes, and these are used as masks to form the polycrystalline silicon film 68. The surface is etched to a certain depth (Fig. 4g). And polycrystalline silicon film 68 not covered with silicon nitride films 70a to 70c.
is selectively oxidized to form a SiO2 film 71. Next, the silicon nitride films 70a to 70c are removed, and the source electrode 7 is placed thereon.
After attaching the 2a1 drain electrode 72b and the 1 gate electrode 72c, a protective film 73 is formed to cover them, thereby completing a MOS type semiconductor device (FIG. 4h).
This embodiment also has the same effects as the previous embodiment. In the embodiment, each electrode is attached to the surface of the base element, but each electrode may be embedded within the element as shown in FIG. 5 to enable multilayer wiring.

That is, in FIG. 5a, 80 is a substrate, 81 is a gate oxide film, 82 is a gate polycrystalline silicon, 83 is a source region, 84 is a drain region, and 85a to 85c are impurities corresponding to the source, drain, and gate electrodes, respectively. 86 is an SlO2 film formed by selectively oxidizing the polycrystalline silicon film 85, 87
is a photosensitive resin. Using this photosensitive resin 87, portions 85a to 85c of the polycrystalline silicon film corresponding to each electrode are photoetched. Then, an aluminum film 88 is formed by a vapor deposition method (Fig. 5b), and then a photosensitive resin 87 is formed.
When the device is immersed in a solvent that dissolves the resin 87, the source electrode 89, drain electrode 90, and gate electrode 91 are buried in the device (FIG. 5c). 6th
The figure shows another example in which each electrode is embedded within the element. That is, in FIG. 6a, 91 is a substrate, 92 is a gate oxide film, 93 is a gate polycrystalline silicon, 94 is a source region, 9
5 is a drain region, 96 is a polycrystalline silicon film containing impurities, and 97, 98, and 99 are portions 9 of the polycrystalline silicon film 96 corresponding to source, drain, and gate electrodes, respectively.
This is a silicon nitride film formed in 6a to 96c. When polycrystalline silicon film 96 is selectively oxidized using these nitride films 97 to 99, portions of polycrystalline silicon film 96 not covered by silicon nitride films 97 to 99 are oxidized to form SlO. It becomes a membrane 100 and expands in volume (FIG. 6b). Next, a photosensitive resin 101 is formed on the SiO2 film 100,
Furthermore, an aluminum film 102 is deposited in layers (FIG. 6c). Next, when the photosensitive resin 101 is dissolved and removed, the source electrode 103, the drain electrode 104 and the gate electrode 1 are removed.
05 is embedded in the element (FIG. 6d). In addition, in the example, impurity diffusion into the source and drain regions is performed after the formation of the gate portion, but as in the reference example (not the example) shown in FIG. It may also be done before formation. That is, a silicon oxide film 112 is provided on a semiconductor substrate 111, a pattern 113 is formed by opening a window in a portion corresponding to a gate portion and a source/drain region, and a P-type impurity is diffused into the pattern 113. A P-type diffusion layer 114 is formed (FIG. 7a)
. Next, a new silicon oxide film 115 is formed, a window is opened in the part corresponding to the gate part, and the silicon oxide film 115 is further formed.
A recess 116 is formed using 5 as a mask. This recess 11
The depth of 6 is chosen so that a channel can be formed at the bottom of the recess 116. Then, a gate oxide film 1 is formed in the recess 116.
17 (FIG. 7b), and a polycrystalline silicon film 118 is further laminated. The subsequent steps are performed in the same manner as in the previous embodiment. As described above, the method for manufacturing a MOS type semiconductor device of the present invention includes the steps of forming a recess after forming a silicon oxide film containing impurities on the main surface of a semiconductor substrate of one conductivity type, and then forming a recess around the periphery of the recess. a gate oxide film forming step of oxidizing a portion of the semiconductor substrate to form a gate oxide film; a first lamination step of laminating a first polycrystalline silicon film on the silicon oxide film and in the recess; Thereafter, a diffusion step was performed to diffuse impurities in the silicon oxide film into the first polycrystalline silicon film on the semiconductor main surface, and then the first polycrystalline silicon film into which the impurities were diffused was selectively removed. Thereafter, a step of removing the silicon oxide film to expose the main surface of the semiconductor substrate, a second lamination step of laminating a second polycrystalline silicon film on the semiconductor substrate, and then a step of laminating the second polycrystalline silicon film on the semiconductor substrate; Impurities of the other conductivity type are diffused into the portions of the semiconductor substrate on both sides of the gate oxide film through the silicon film to form source and drain regions, and the impurities are doped into the first polycrystalline silicon film remaining in the recess. a step of diffusing impurities, and then providing source, drain, and gate electrodes in the source, drain region, and the first polycrystalline silicon film remaining in the recess through the second polycrystalline silicon film, respectively. Since the method includes an electrode arrangement step, it is possible to realize a MOS type semiconductor device that can achieve high density and is low in cost.

Further, when the diffusion step is performed by providing a mask member on the main surface of the semiconductor substrate and using this mask member to restrict diffusion of impurities of the silicon film to the main surface of the semiconductor substrate, impurity diffusion can be easily performed. Become.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram explaining the drawbacks of the conventional example, Fig. 2 is an explanatory diagram of the process of one embodiment of the present invention, Fig. 3 is an explanatory diagram of the process of another embodiment, and Fig. 4 is an explanatory diagram of the process of one embodiment of the present invention. FIG. 5 is a process explanatory diagram of another example, FIG. 6 is a process explanatory diagram of yet another embodiment, and FIG. 7 is a process explanatory diagram of a reference example. 20... Semiconductor substrate, 22... Doped silicon oxide film, 25a... Concave portion, 25b...
... Gate oxide film, 26 ... Polycrystalline silicon film, 29 ... Source region, 30 ... Drain region, 34a ... Source electrode, 34b.・
...Drain electrode, 34c...Gate electrode.

Claims (1)

[Claims] 1. A recess forming step in which a silicon oxide film containing impurities is formed on the main surface of a semiconductor substrate of one conductivity type, and then a recess is formed, and then a portion of the semiconductor substrate around the recess is oxidized to form a gate. A gate oxide film forming step of forming an oxide film, a first stacking step of stacking a first polycrystalline silicon film on the silicon oxide film and in the recess, and then a step of removing impurities from the silicon oxide film from the semiconductor layer. the first on the main surface
a diffusion step of diffusing the impurity into the polycrystalline silicon film, and then selectively removing the first polycrystalline silicon film into which the impurity has been diffused, and then removing the silicon oxide film to expose the main surface of the semiconductor substrate. a second stacking step of stacking a second polycrystalline silicon film on the semiconductor substrate; an impurity diffusion step of diffusing an impurity of a conductivity type to form source and drain regions and also diffusing the impurity into the first polycrystalline silicon film remaining in the recess, and then forming the second polycrystalline silicon film. A source,
1. A method for manufacturing a MOS semiconductor device, including an electrode disposing step of disposing a drain electrode and a gate electrode, respectively. 2. Before forming a silicon oxide film containing impurities on the main surface of the semiconductor substrate of the one conductivity type, diffusion of impurities in the silicon oxide film to the main surface of the semiconductor substrate is performed on the main surface of the semiconductor substrate of the one conductivity type. A method of manufacturing a MOS type semiconductor device according to claim 1, characterized in that mask members for regulating are laminated. 3. Between the impurity diffusion step and the electrode provision step, leave a portion of the second polycrystalline silicon film where the source, drain, and gate electrodes are provided, and oxidize the other portion to form a silicon oxide film. A method for manufacturing a MOS type semiconductor device according to claim 1, including the step of: