JPS6045050A - Structure of resistor element - Google Patents
Structure of resistor elementInfo
- Publication number
- JPS6045050A JPS6045050A JP15270883A JP15270883A JPS6045050A JP S6045050 A JPS6045050 A JP S6045050A JP 15270883 A JP15270883 A JP 15270883A JP 15270883 A JP15270883 A JP 15270883A JP S6045050 A JPS6045050 A JP S6045050A
- Authority
- JP
- Japan
- Prior art keywords
- film
- oxide film
- resistor
- substrate
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 24
- 239000012535 impurity Substances 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 21
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 21
- 230000001590 oxidative effect Effects 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims description 2
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 6
- 238000010438 heat treatment Methods 0.000 abstract description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract description 4
- 238000006243 chemical reaction Methods 0.000 abstract description 3
- 238000005468 ion implantation Methods 0.000 abstract description 3
- 229910052757 nitrogen Inorganic materials 0.000 abstract description 3
- 230000003647 oxidation Effects 0.000 abstract description 3
- 238000007254 oxidation reaction Methods 0.000 abstract description 3
- 239000012808 vapor phase Substances 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 150000004767 nitrides Chemical class 0.000 abstract 1
- 239000010408 film Substances 0.000 description 44
- 238000004519 manufacturing process Methods 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 6
- 230000001133 acceleration Effects 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- ZXEYZECDXFPJRJ-UHFFFAOYSA-N $l^{3}-silane;platinum Chemical compound [SiH3].[Pt] ZXEYZECDXFPJRJ-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000010574 gas phase reaction Methods 0.000 description 3
- 229910021339 platinum silicide Inorganic materials 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- PMOWTIHVNWZYFI-WAYWQWQTSA-N cis-2-coumaric acid Chemical compound OC(=O)\C=C/C1=CC=CC=C1O PMOWTIHVNWZYFI-WAYWQWQTSA-N 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は超小型の抵抗体素子に関し、好ましくは、半導
体集積回路装置に使用される超小型の抵抗体素子に関す
るものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an ultra-small resistor element, and preferably to an ultra-small resistor element used in a semiconductor integrated circuit device.
現在この種の抵抗体素子として、PN接合により分離さ
れた単結晶シリコン領域の代わりに、シリコン酸化膜に
より分離された多結晶シリコン領域が使用されるように
なってきている。この理由として1分離面積が小さくな
シ小形化可能、電圧電流特性が線形である、寄生容量が
減少する、多層構造が容易にできるため設計の自由度が
大きい。Currently, as this type of resistor element, polycrystalline silicon regions separated by silicon oxide films are being used instead of single crystal silicon regions separated by PN junctions. The reasons for this are that the isolation area is small, the device can be miniaturized, the voltage-current characteristics are linear, the parasitic capacitance is reduced, and a multilayer structure can be easily formed, so there is a high degree of freedom in design.
等が挙けられる。etc. are mentioned.
第1図(a)〜(d)、(e)−(h)は、従来のシリ
コン酸化膜によシ分離された多結晶シリコン領域を使用
した抵抗体素子(以下では超小型線形抵抗体素子と言う
)の製造工程を説明するだめの横断面図、および縦断面
図である。まず、第1図(a) 、 (e)のように、
シリコン基板1を熱酸化して、シリコン酸化膜2を生成
し、基板表面の全面に厚さtlの多結晶シリコン膜3を
気相反応により生成被着させ、窒素雰囲気中で高温熱処
理を行うことによシ、該多結晶シリコン膜の膜質を安定
化させる。Figures 1 (a) to (d) and (e) to (h) show a conventional resistor element (hereinafter referred to as an ultra-small linear resistor element) using polycrystalline silicon regions separated by a silicon oxide film. FIG. 2 is a cross-sectional view and a vertical cross-sectional view illustrating the manufacturing process. First, as shown in Figures 1(a) and (e),
A silicon oxide film 2 is generated by thermally oxidizing a silicon substrate 1, a polycrystalline silicon film 3 having a thickness of tl is deposited on the entire surface of the substrate by a gas phase reaction, and high temperature heat treatment is performed in a nitrogen atmosphere. Additionally, the quality of the polycrystalline silicon film is stabilized.
次に熱酸化によシ、多結晶シリコン膜3上に薄いシリコ
ン酸化膜4を生成した後、シリコン酸化膜4上の全面に
わたって、薄いシリコン窒化膜5を気相反応によシ生成
被着させる。次にホトレジストを用いて、将来の抵抗素
子となるべき部分の上を除く他の全てのシリコン窒化膜
を除去した後に、同図(b) 、 (f)のように、高
温の酸化処理を行うことによシ、シリコン窒化膜5の下
取外の多結晶シリコン膜3を厚いシリコン酸化膜6に変
換する。Next, a thin silicon oxide film 4 is formed on the polycrystalline silicon film 3 by thermal oxidation, and then a thin silicon nitride film 5 is formed and deposited over the entire surface of the silicon oxide film 4 by a vapor phase reaction. . Next, use photoresist to remove all the silicon nitride film except on the part that will become the future resistance element, and then perform high-temperature oxidation treatment as shown in Figures (b) and (f). In particular, the polycrystalline silicon film 3 that is not replaced by the silicon nitride film 5 is converted into a thick silicon oxide film 6.
次に基板表面の全面にわたって、ボロン原子を高加速電
圧で、所望の弼だけ深くイオン注入した後に、窒素中で
熱処理を行うことにょシ、前記注入不純物原子を活性化
させ、よって、同図(c)、 (g)のように、多結晶
シリコン膜の全領域にわたって、はぼ不純物一度が一定
(すなわち比抵抗ρ1が一定)の抵抗体領域7を形成す
る。次に同図(d)、(h)のように、残存しているシ
リコン窒化膜5を除去し、ホトレジストにてシリコン酸
化膜4に抵抗電極用の孔を開孔し、基板表面の全面にわ
たって白金薄膜を被着させ、窒素雰囲気中で低温熱処理
を行い、抵抗電極部に、自己整合で白金シリサイド層8
を生成(オーミック接触を形成)した後、残存している
、シリコン酸化P上の白金を除去する。次に基板表面の
全面にわたって、気相反応によりシリコン酸化膜9を生
成被着させ、ホトレジストにてスルーホールを開孔した
後、基板表面の全面にわたってアルミニウム10を被着
させ、ホトレジストにて、他の素子への配線パターンあ
るいは、ポンディングパッドを形成する。Next, boron atoms are ion-implanted to a desired depth over the entire surface of the substrate at a high acceleration voltage, and then heat treatment is performed in nitrogen to activate the implanted impurity atoms. As shown in c) and (g), a resistor region 7 in which the impurity level is constant (that is, the resistivity ρ1 is constant) is formed over the entire region of the polycrystalline silicon film. Next, as shown in Figures (d) and (h), the remaining silicon nitride film 5 is removed, and holes for resistive electrodes are made in the silicon oxide film 4 using photoresist, covering the entire surface of the substrate. A platinum thin film is deposited and subjected to low-temperature heat treatment in a nitrogen atmosphere, and a platinum silicide layer 8 is formed on the resistive electrode part in a self-aligned manner.
After forming (forming an ohmic contact), the remaining platinum on the silicon oxide P is removed. Next, a silicon oxide film 9 is formed and deposited over the entire surface of the substrate by a gas phase reaction, and after opening through holes with photoresist, aluminum 10 is deposited over the entire surface of the substrate. Form a wiring pattern or a bonding pad for the device.
この構造において、抵抗値R4は(1)式で表わされる
。In this structure, the resistance value R4 is expressed by equation (1).
ただし、ρ、は抵抗体領域の比抵抗
1、は抵抗体領域の長さ
t、は抵抗体領域の深さくすなわち多結晶シリコン膜の
厚さ)
W、′は抵抗体領域の実効的な巾
W、は抵抗体領域のパターン設計IJ
Wはシリコン酸化膜6の構拡がり巾
である。Here, ρ is the specific resistance 1 of the resistor region, t is the length of the resistor region, t is the depth of the resistor region, that is, the thickness of the polycrystalline silicon film) W,' is the effective width of the resistor region W is the pattern design IJ of the resistor region; W is the width of the silicon oxide film 6;
抵抗値R,の精度は、ρI + jl + W1′+7
’lの各値の製造上のばらつきを小さくすれば向上する
。しかしこの中で、多結晶シリコン膜3の厚さt、およ
びシリコン酸化膜6の横拡がり[IJは、通常その値の
制御が最も困難であり、製造上のばらつきが大きく、抵
抗値R,の精度を低くする原因となっていた。The accuracy of the resistance value R, is ρI + jl + W1'+7
The improvement can be achieved by reducing manufacturing variations in each value of 'l. However, among these, the thickness t of the polycrystalline silicon film 3 and the lateral spread [IJ] of the silicon oxide film 6 are usually the most difficult to control, and there are large manufacturing variations, and the resistance value R, This caused a decrease in accuracy.
この様に、従来の超小型線形抵抗体素子構造においては
抵抗値R1の制御が困難で、製造−Eのばらつきが大き
いパラメータにより決定されるため、抵抗値精度が低い
という欠点があった。As described above, in the conventional ultra-small linear resistor element structure, it is difficult to control the resistance value R1, and the resistance value R1 is determined by parameters with large manufacturing variations, so that the resistance value accuracy is low.
本発明の目的は上記の欠点を除き、高精度な抵抗値をも
つ超小型線形抵抗体素子構造を提供することである。SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide an ultra-small linear resistor element structure having a highly accurate resistance value.
本発明の抵抗体素子構造は、比抵抗の極めて高い多結晶
シリコン膜を形成し、その一部領域に不純物を添加する
ことにより、抵抗体領域を形成することで得られる。The resistor element structure of the present invention is obtained by forming a polycrystalline silicon film with extremely high specific resistance and adding impurities to a partial region of the polycrystalline silicon film to form a resistor region.
つぎに本発明の一実施例について、製造工程を説明する
。第2図(a)−(d)、(e)〜(h)は本発明の一
実施例の抵抗体素子構造の製造工程を説明するだめの横
断面図および縦断面図である。まず、第1図(a)、
(e)のように、シリコン基板1を熱酸化して、シリコ
ン酸化膜2を生成し、基板表面の全面に厚さ11の多結
晶シリコン膜13を気相反応によシ生成被着させる。こ
の時、多結晶シリコン膜13の比抵抗を十分高くするた
め、例えば多結晶シリコン膜の酸緊含有量が多くなる+
4に、気相反応条件を設定する。以下第2図(+))、
(f)までは第1図(b)、 (f)−にでと全く同じ
工4jiで形成される。次に、第2図(C)、(g)の
ように、ホトレジストを用いてシリコン酸化膜6の横拡
がり部分を覆い、かつ所望の抵抗中W2が得られる様に
、ホトレジストパターン12!c形成した後、基イ反表
面の全面にわたって、ボロン原子を低加速電圧で所望の
量だけ浅くイオン注入した後に、窒素中で熱処理を行う
ことにより、前記注入不純物原子を活性化させ、深さt
2でほぼ不純物gt=が一定(tなわち比抵抗ρ2が一
定)の抵抗体領域17を形1j2する0つぎに第2図(
d)、 (h)のように、ホトレジスト12を除去した
後、第1図(d)、 (IJ)までと全く同じ工程で形
成される。Next, a manufacturing process for an embodiment of the present invention will be explained. FIGS. 2(a)-(d) and (e)-(h) are a cross-sectional view and a vertical cross-sectional view for explaining the manufacturing process of a resistor element structure according to an embodiment of the present invention. First, Figure 1(a),
As shown in (e), a silicon substrate 1 is thermally oxidized to form a silicon oxide film 2, and a polycrystalline silicon film 13 having a thickness of 11 is deposited over the entire surface of the substrate by vapor phase reaction. At this time, in order to make the specific resistance of the polycrystalline silicon film 13 sufficiently high, for example, the acid content of the polycrystalline silicon film increases.
In step 4, gas phase reaction conditions are set. Figure 2 below (+)),
The steps up to (f) are formed by the same process 4ji as in FIG. 1(b) and (f)-. Next, as shown in FIGS. 2C and 2G, a photoresist is used to cover the laterally expanding portion of the silicon oxide film 6, and a photoresist pattern 12! is formed so as to obtain the desired resistance W2! After forming C, boron atoms are ion-implanted in a desired amount over the entire surface of the group at a low acceleration voltage, and then heat treatment is performed in nitrogen to activate the implanted impurity atoms and increase the depth. t
2, the resistor region 17 in which the impurity gt= is almost constant (t, that is, the specific resistance ρ2 is constant) is formed into a shape 1j2. Next, as shown in FIG.
d) and (h), after removing the photoresist 12, they are formed in exactly the same steps up to FIG. 1(d) and (IJ).
この構造においては、不純物のみツノ11されていない
多結晶シリコン領域の比抵抗eま十分に高いので、抵抗
値は不純物が添加された低比抵抗領域により決定される
。抵抗値R,は(2)式で表わされる、ただし ρ2は
抵抗体領域の比抵抗
!、は抵抗体領域の長さ
t2は抵抗体領域の深さ
W、れl、抵抗体領域のrlj
である。In this structure, since the resistivity e of the polycrystalline silicon region without the impurity horns 11 is sufficiently high, the resistance value is determined by the low resistivity region to which the impurity is added. The resistance value R, is expressed by equation (2), where ρ2 is the specific resistance of the resistor region! , is the length t2 of the resistor region, is the depth W of the resistor region, is l, and is rlj of the resistor region.
ここで抵抗体領域の深さt2は、イオン注入の加速電圧
とシリコン酸化膜4およびシリコン窒化膜5の厚さKよ
り決定され、例えば、これらの膜の厚さのばらつきに応
じて、加速電圧を加減することにより、その深さの設定
値に対するばらつきΔ12/1.は、前述の多結晶シリ
コン膜厚の設定値に対するばらつきΔt + / t
rよpも小さくなるように制御することができる。また
、抵抗体領域のrllW、は、シリコン酸化膜6の横波
り巾Wとは全く無関係となシ、その設定値に対するばら
つきΔWヮ/W、け、前述の実効的な抵抗rfJVqの
設定値に対するばらつきΔW、′/WI′ よりも小さ
くなるように制御することができる。Here, the depth t2 of the resistor region is determined by the acceleration voltage of ion implantation and the thickness K of the silicon oxide film 4 and the silicon nitride film 5. For example, depending on the variation in the thickness of these films, the acceleration voltage By adjusting the depth, the variation Δ12/1. is the variation Δt + / t with respect to the set value of the polycrystalline silicon film thickness mentioned above
It is also possible to control so that r and p become smaller. In addition, rllW of the resistor region is completely unrelated to the transverse wave width W of the silicon oxide film 6, and the variation ΔW/W with respect to its set value is different from the set value of the above-mentioned effective resistance rfJVq. It can be controlled so that the variation ΔW,'/WI' is smaller than that.
従って本発明の抵抗体素子構造における抵抗値几、の設
計値に対するばらつきΔ几、/B、、は、従来の構造に
よる抵抗値n、の股側値に対するばらつきΔR,/R,
,よυも小さくなる。すなわち抵抗値の精度を向上する
ことができる。Therefore, the variation ΔR,/R, /B, of the resistance value n, with respect to the designed value in the resistor element structure of the present invention is the variation ΔR, /R,
, yoυ also becomes smaller. In other words, the accuracy of the resistance value can be improved.
第2図は、多結晶シリコン膜13の膜厚ばらつき対策(
1)とシリコン酸化膜6の構拡り巾のばらつき対策(2
)を同時に行った例であるが、これらの対策を片方だけ
行っただけでも抵抗値の精度を現在よりも向上すること
ができる。第3図に、多結晶シリコン膜13に対し、不
純物添加を深さ方向だけに限定して抵抗領域27を設け
た、対策(1)を、第4図に1不純物添加を横方向に限
定して抵抗領域37を設けた対策(2)を行った例の桔
牙−を示す。FIG. 2 shows measures against variations in the thickness of the polycrystalline silicon film 13 (
1) and measures against variations in the structural width of the silicon oxide film 6 (2)
) are taken at the same time, but even if only one of these measures is taken, the accuracy of the resistance value can be improved compared to the current level. FIG. 3 shows countermeasure (1) in which the resistance region 27 is provided by limiting impurity addition to the polycrystalline silicon film 13 only in the depth direction, and FIG. 4 shows countermeasure (1) in which impurity addition is limited to the lateral direction. This figure shows an example of countermeasure (2) in which a resistance region 37 is provided.
第2.第3.第4図の例では、不純物の添加をイオン注
入法で行ったが、これに代わって熱拡散法によp行うこ
とも可能である。また、オーミック接触の形成は、白金
シリサイド生成の代わりに、高濃度のボロンを抵抗電椿
部に拡散することによシ行っても良い。Second. Third. In the example shown in FIG. 4, the impurity is added by ion implantation, but it is also possible to add the impurity by thermal diffusion instead. Furthermore, the ohmic contact may be formed by diffusing high concentration boron into the resistive electrode portion instead of generating platinum silicide.
以上説明した様に、本発明の構造によれば、高精度な超
小型線形抵抗体素子構造を得ることができる。As explained above, according to the structure of the present invention, a highly accurate ultra-small linear resistor element structure can be obtained.
第1図(a)〜(d)、(e)〜(h)はそれぞれ従来
の抵抗体素子構造の製造工程を説明する横断面図および
縦断面図、第2図(→〜(d+ 、 (’e)〜(h)
は本発明の一実施例の製造工程順の横断面図および縦断
面図、第3図(a)、(b)は本発明の他の実施例の横
断面図および縦断面図、第4図(a)、(b)は本発明
のさらに他の実施例の横断面図および縦断面図である。
1・・・・・・シリコン基板、2・・・・・・シリコン
酸化膜、3.13・・・・・・多結晶シリコン膜、4・
−・・−・薄いシリコン酸化膜、5・・・・・・シリコ
ン窒化膜、6・・・・・・厚いシリコン酸化膜、7.1
7,27.37・・・・・・不純物の添加された多結晶
シリコン膜、8・・・・・・白金シリサイド層、9・・
・・・・気相成長シリコン酸化膜、10・・・・・・ア
ルミ、12・・・・・・ホトレジスト膜。
(u) (8)
(b) (f)
(C) (’j)
(d) < k )
(tl) 、。
(C) (tj、)
((f) 、7い
((Z)
形
范・
<b>
3 閉
(b)
プ 15Figures 1 (a) to (d) and (e) to (h) are a cross-sectional view and a vertical cross-sectional view respectively illustrating the manufacturing process of a conventional resistor element structure, and Figure 2 (→~(d+, ( 'e)~(h)
3(a) and 3(b) are a cross-sectional view and a vertical cross-sectional view of another embodiment of the present invention, and FIG. (a) and (b) are a cross-sectional view and a longitudinal cross-sectional view of still another embodiment of the present invention. 1...Silicon substrate, 2...Silicon oxide film, 3.13...Polycrystalline silicon film, 4...
- Thin silicon oxide film, 5... Silicon nitride film, 6... Thick silicon oxide film, 7.1
7,27.37...Polycrystalline silicon film doped with impurities, 8...Platinum silicide layer, 9...
...Vapour-grown silicon oxide film, 10...Aluminum, 12...Photoresist film. (u) (8) (b) (f) (C) ('j) (d) < k ) (tl) ,. (C) (tj,) ((f),7ii((Z) form fan・ <b> 3 closed (b) pu 15
Claims (1)
る多結晶シリコン膜を、選択的に酸化することにより、
形成された/シリコン酸化物で、他の素子と分離された
該多結晶シリコン膜の一部の領域にのみ不純物が添加さ
れていることを特徴とする抵抗体素子構造。By selectively oxidizing a polycrystalline silicon film with high specific resistance provided on an insulating film of a semiconductor substrate,
A resistor element structure characterized in that an impurity is added only to a partial region of the polycrystalline silicon film separated from other elements by silicon oxide.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15270883A JPS6045050A (en) | 1983-08-22 | 1983-08-22 | Structure of resistor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15270883A JPS6045050A (en) | 1983-08-22 | 1983-08-22 | Structure of resistor element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6045050A true JPS6045050A (en) | 1985-03-11 |
Family
ID=15546412
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15270883A Pending JPS6045050A (en) | 1983-08-22 | 1983-08-22 | Structure of resistor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6045050A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50127585A (en) * | 1974-03-26 | 1975-10-07 | ||
JPS5283073A (en) * | 1975-12-29 | 1977-07-11 | Matsushita Electric Ind Co Ltd | Production of semiconductor device |
-
1983
- 1983-08-22 JP JP15270883A patent/JPS6045050A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50127585A (en) * | 1974-03-26 | 1975-10-07 | ||
JPS5283073A (en) * | 1975-12-29 | 1977-07-11 | Matsushita Electric Ind Co Ltd | Production of semiconductor device |
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