JP2000021896A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the resistance value variation by forming an insulation film contg. a thermally diffusing impurity on a substrate, forming a film which absorbs or reflects the heat and uniformizes the temp. of an underlying part at heating on the insulation film and heating the insulation film to thermally diffuse the impurity in the insulation film to make it conductive. SOLUTION: An insulation film 2 of Si oxide, etc., is formed on an Si semiconductor substrate 1, a polycrystal Si film 3 doped with an impurity is formed, an impurity diffusion-blocking film 4 such as insulation film, etc., is formed to cover the film 3, a film 5 is formed the entire surface thereon which absorbs or reflects the heat and uniformizes the temp. of an underlying part at heating and heated, using a lamp type heat treating apparatus. This heat-treatment uniformly activates the impurity in the polycrystal Si film 3 to obtain a polycrystal Si resistance having specified resistance value, the film 5 is removed by etching, holes are opened at regions forming a wiring layer, and a wiring material is deposited to form a wiring layer 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a polysilicon resistor and / or a bipolar transistor. The present invention relates to a method for manufacturing a semiconductor device characterized by a step of activating impurities in the insulating film by heat treatment or uniformly thermally diffusing the impurities into a semiconductor substrate.

[0002]

2. Description of the Related Art In recent years, miniaturization and high performance of semiconductor devices have been increasingly advanced. For example, in a semiconductor device having a polysilicon resistor or a bipolar transistor,
There is a demand for higher precision and higher performance of semiconductor devices,
It is essential to make the polysilicon resistance uniform and to reduce the base width of the bipolar transistor.

For example, in manufacturing a bipolar transistor having an NPN transistor shown in FIG.
In recent years, as a method of further reducing the base width, a method of performing a high-temperature short-time heat treatment using a lamp annealing apparatus has been used in an emitter diffusion heat treatment step as a shallow junction formation method. As a result, it is possible to form and activate the emitter diffusion layer while maintaining the base diffusion layer, so that the base width can be further reduced.

[0004] An NPN transistor (hereinafter abbreviated as "NPN Tr") having a step of forming and activating an emitter diffusion layer by performing high-temperature and short-time heat treatment using the above-described lamp-type semiconductor heat treatment apparatus is described below. A method for manufacturing a mounted conventional semiconductor device will be described in detail with reference to the drawings.

FIG. 7 is a structural sectional view of an NPN Tr portion manufactured by a conventional method of manufacturing a semiconductor device having an NPN transistor on a semiconductor substrate.

In FIG. 7, an NPN Tr has an n ⁺ buried diffusion layer 202 at a predetermined position on a p-type silicon semiconductor substrate 201 and an n-type epitaxial layer 205 above the buried diffusion layer 202. The active region of the L-PNP Tr is They are separated by an element separation film 204. Further, the element isolation film 20
4, an element isolation diffusion layer 203 for isolating the transistor from an adjacent transistor is provided.

The base electrode 218a of the NPN Tr is connected to the graft base layer 216 which is a p-type impurity diffusion region via the polysilicon layer 208, and the emitter electrode 21
8b is connected via a polysilicon layer 212 to an emitter region 217 that is an n-type impurity diffusion region. Further, the collector electrode 218c is connected to the n-type buried layer 202 via the n-type diffusion layer 207.

Next, a conventional method for manufacturing the semiconductor device shown in FIG. 7 will be described with reference to the drawings. First,
As shown in FIG. 8A, the p-type silicon semiconductor substrate 20
First, an n-type buried layer 202 is formed, and an n-type epitaxial layer 205 serving as a base region is further formed thereon. Next, LOCOS (Local Oxidati
element isolation film 20 by an on-silicon method.
4 and the NP separated by the device isolation film 204
The nTr collector electrode forming region is filled with n such as phosphorus or arsenic.
N type impurity diffusion layer 2
07 is formed. After that, a silicon oxide film 206 is formed on the entire surface by, for example, a thermal oxidation method.

Next, as shown in FIG. 8B, patterning for forming an emitter electrode is performed to open an emitter electrode forming portion. Then, the first made of polysilicon or the like
Of boron, which is a p-type impurity, is ion-implanted into the opening and processed by a dry etching method using a photolithography technique to take out a base electrode and to form a p ⁺ region 208 of an external base. Form a diffusion source.

Further, as shown in FIG. 9C, an insulating film 209 such as a silicon oxide film is formed by, for example, CVD (Chem).
After a film is formed on the entire surface by an ideal vapor deposition method, a resist film 210 is formed on the entire surface, and photolithography and RIE (reactive) are performed.
The emitter region forming portion is opened until the n-type epitaxial layer 205 is exposed by the technique of Ion Etching.

Next, as shown in FIG.
The intrinsic base region 211 is formed by implanting a p-type impurity such as boron into the opening 211 of the Tr portion emitter electrode formation region by, for example, an ion implantation method. This step is performed by, for example, ion-implanting boron (B ⁺ or BF ₂ ⁺ ) with an energy of 5 keV to 200 keV and a dose of about 5.0 × 10 ^{11 to} 5.0 × 10 ¹⁴ / cm ^2. .

Next, after removing the resist film 210, as shown in FIG. 10E, an insulating film such as a silicon oxide film (not shown) is
The side wall 213 is formed by forming the layer with a thickness of 0 to 1000 nm and performing etch back by the RIE method.

Subsequently, as shown in FIG.
Polysilicon containing an n-type impurity such as s and P is deposited to a thickness of 100 to 200 nm by, for example, a CVD method to form a polysilicon film 212 doped with the impurity.
To form Note that after depositing polysilicon containing no impurity, an impurity-doped polysilicon film 212 can be formed by ion-implanting n-type impurities such as As and P.

Thereafter, a silicon oxide film (not shown) is formed to a thickness of 100 to 500 nm by, for example, a CVD method, and heat-treated at 800 ° C. for 30 to 60 minutes. ℃ high temperature,
The heat treatment is performed for about 5 seconds to 2 hours. By this heat treatment, p ^{+ is} added to epitaxial layer 205 by impurity diffusion from polysilicon film 208 doped with an n-type impurity.
Regions (graft-based diffusion layers) 216 can be formed. Also, n ⁺ polycrystalline silicon resistance layer 212 to n
The emitter region 217 can be formed by diffusing the type impurity into the epitaxial layer 205.

Next, the second conductive film 212 doped with an n-type impurity is processed by a photolithography technique and a dry etching method to remove portions other than the emitter electrode portion of the NPN transistor.

Then, openings are made in the collector electrode portion and the base electrode portion of the NPN Tr, and a barrier metal layer made of titanium or the like and a conductive material such as aluminum are laminated and processed by a photolithography technique and a dry etching method. , An NPN transistor, a base electrode, an emitter electrode, and a collector electrode can be formed. As described above, a semiconductor device having an NPN transistor as shown in FIG. 7 can be manufactured.

As a technique related to the present invention, in Japanese Patent Application Laid-Open No. 61-59738, the periphery of a silicon wafer is surrounded by a film made of a material having a lower thermal conductivity than silicon, such as a polycrystalline silicon film. A silicon wafer is disclosed. This is because when heat-treating a silicon wafer, the occurrence of the slip line of the wafer, which mainly occurs at the contact portion between the wafer peripheral portion and the quartz container containing the wafer, is reduced by using a material having a lower thermal conductivity than silicon at the wafer peripheral portion. It is intended to suppress as much as possible by covering with a film.

[0018]

In the above-described conventional semiconductor device manufacturing process, the entire substrate is heated at a high temperature for a short time by a ramp type heat treatment apparatus to remove impurities contained in the polycrystalline silicon by n-type epitaxial growth. In the step of thermally diffusing a layer (so-called lamp annealing), it is important to form a uniform diffusion layer to obtain a highly reliable semiconductor device, and the temperature at which heat reaches the inside of the wafer by heating is important. It is a factor.

It is known that the temperature reached inside the substrate is determined by the level of absorption of the lamp light and the heat conduction therefrom. For example, a polycrystalline silicon resistor in which an impurity is doped in polycrystalline silicon has a temperature reached by not only its own light absorption but also, for example, the light absorption of a peripheral silicon oxide film and heat conduction therefrom.

This means that the temperature reaching the inside differs depending on the difference in the vertical film structure of the NPN Tr. In other words, the temperature that reaches the inside of the substrate is greatly affected by, for example, the dependence of the coarse density pattern on the layout of the bipolar transistor and the polycrystalline silicon resistor.

That is, prior to the lamp annealing step in the above-described conventional method, for example, FIGS.
As shown in the figure, the impurities B in the polycrystalline silicon A are non-uniformly dispersed when viewed microscopically, and a difference occurs in the vertical film structure. Therefore, there is a difference in the way heat is transmitted from the top, bottom, left and right, resulting in a difference in the temperature at which the heat reaches the inside of the wafer, and uneven diffusion of impurities.

This causes a pattern-dependent Vf (forward voltage) value variation and a resistance value variation in a bipolar transistor and a polycrystalline silicon resistor that require high accuracy. There has been a demand for the development of a method of forming a conductive portion and a method of manufacturing a semiconductor device in which variations in (forward voltage) values and resistance values are small.

Therefore, the present invention solves this problem by realizing a uniform wafer heat treatment.
Vf of bipolar transistor requiring high accuracy
It is an object of the present invention to provide a method for manufacturing a highly reliable semiconductor device with good yield by controlling the variation in the value and the variation in the resistance value of the polycrystalline silicon resistor.

[0024]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention comprises a step of forming an insulating film containing impurities for thermal diffusion on a substrate; Forming a film that equalizes the temperature of the lower portion of the insulating film, and thermally diffusing the impurities into the insulating film by heating the insulating film to make the insulating film conductive. A part forming method is provided.

In the conductive part forming method of the present invention, the step of forming a film on the insulating film that absorbs or reflects heat and makes the temperature below the film uniform with respect to the heating is preferably performed by using the insulating film. There is a step of forming a film made of silicon carbide, amorphous silicon, titanium or TiON thereon.

The step of forming an insulating film containing impurities for thermal diffusion on the substrate preferably includes the step of forming a layer made of polycrystalline silicon doped with impurities on the substrate.

In the present invention, after the step of forming a film that absorbs or reflects heat on the insulating film and makes the temperature below the film uniform with respect to heating, heat is applied to the insulating film. More preferably, the method further includes a step of forming an impurity diffusion preventing layer on a film that absorbs or reflects and makes the temperature below the film uniform with respect to heating. The impurity diffusion preventing layer is provided to prevent the impurity from absorbing or reflecting heat and thermally diffusing into a film below the film to make the temperature uniform when heated.

Further, in the present invention, the step of heating the insulating film to thermally diffuse the impurities into the insulating film to make the insulating film conductive includes the step of using a ramp type semiconductor heat treatment apparatus to form the insulating film. It is preferable to have a heating step.

According to the conductive part forming method of the present invention, polysilicon, silicon carbide (S) is formed on an impurity-doped insulating film via an impurity diffusion preventing layer such as an insulating film.
After forming a film that absorbs or reflects heat such as iC), titanium, TiON, etc., and makes the temperature below the film uniform with respect to heating, the process of heat-treating the insulating film doped with impurities is characterized. Have.

That is, after a film made of a material having good thermal conductivity, such as polysilicon, silicon carbide, or titanium, is easily formed on an insulating film such as a polysilicon film doped with impurities, the substrate is formed. When the heat treatment is performed, the speed of arrival of heat due to the difference in the vertical structure pattern is reduced, and a uniform heat treatment can be performed on the entire insulating film such as a doped polysilicon film.

When a film made of a material having low thermal conductivity such as TiON is formed, the film is uniformly formed not from the vertical structure side having the pattern difference (substrate surface side) but from the back surface of the substrate having the small pattern difference. Heat is transmitted, and non-uniform heat conduction depending on the substrate pattern is eliminated.

Therefore, as a result, a uniform heat treatment can be applied to the entire substrate, and a conductive polycrystalline silicon film or a polycrystalline silicon resistor having a uniform resistance (uniformly doped with impurities) can be formed. .

Further, according to the present invention, there is provided a method of manufacturing a semiconductor device having a bipolar transistor, comprising: forming a first insulating film on one conductivity type semiconductor substrate; and etching the first insulating film. A step of opening a predetermined region, a step of forming a second insulating film containing impurities for thermal diffusion, a step of forming a third insulating film on the entire surface of the second insulating film, 3. a step of opening a predetermined region by etching the second and first insulating films, a step of forming a fourth insulating film containing impurities for thermal diffusion, and a step of forming a thermal insulating film on the fourth insulating film. Forming a film that absorbs or reflects light and makes the temperature below the film uniform with respect to heating; and heating the second and fourth insulating films to remove the impurities from the second insulating film.
And thermally diffusing into the fourth insulating film to make the second and fourth insulating films conductive, and diffusing the impurities into the opening region of the one conductivity type semiconductor substrate,
Forming an impurity diffusion region in the one conductivity type semiconductor substrate.

In the present invention, the step of forming a second insulating film containing an impurity for thermal diffusion on the first insulating film may comprise the step of forming a polycrystalline doped impurity on the first insulating film. It is preferable to include a step of forming a layer made of silicon.

The step of forming the second insulating film containing the impurity on the entire surface preferably includes the step of forming a layer made of polycrystalline silicon doped with the impurity on the entire surface.

Further, in the present invention, the step of forming a film for absorbing or reflecting heat on the fourth insulating film and making the temperature below the fourth insulating film uniform is performed on the second insulating film. Preferably, the method further comprises a step of forming a film made of silicon carbide, amorphous silicon, titanium or TiON.

Further, in the present invention, after the step of forming a film for absorbing or reflecting heat on the second insulating film and making the temperature below the second insulating film uniform, the heat is absorbed or reflected. It is more preferable that the method further includes a step of forming an impurity diffusion preventing layer on a film for making the temperature below the film uniform with respect to heating.

The step of forming an impurity diffusion preventing layer on the step of forming a film that absorbs or reflects the heat and makes the temperature below the layer uniform with respect to the heating includes the step of forming a film that absorbs or reflects the heat. It is preferable to include a step of forming a film made of silicon oxide on the film made of silicon oxide.

The step of heating the second and fourth insulating films may further include the step of heating the second and fourth insulating films by heating using a ramp type semiconductor heat treatment apparatus. preferable.

According to the present invention, heat such as polysilicon, silicon carbide (SiC), titanium, TiO, or the like is absorbed on an impurity-doped insulating film through an impurity diffusion preventing layer such as an insulating film. Alternatively, the method is characterized in that after forming a film that reflects and makes the temperature below the film uniform with respect to heating, the insulating film doped with impurities is subjected to heat treatment.

According to the present invention, a conductive polycrystalline silicon film having a uniform impurity diffusion layer and a uniform resistance (uniformly doped with impurities) and a polycrystalline silicon resistor can be formed. And a highly accurate conductive portion and a semiconductor device with very little variation in resistance value can be manufactured.

Further, according to the present invention, in a method of manufacturing a semiconductor device having a bipolar transistor and a polycrystalline silicon resistor, a step of forming a first insulating film on one conductivity type semiconductor substrate; Etching to open a predetermined region, forming a first polycrystalline silicon film containing a thermal diffusion impurity, and forming a second insulating film on the entire surface of the first polycrystalline silicon film. Forming the second insulating film, the polycrystalline silicon film and the first
Opening a predetermined region by etching the insulating film, forming a second polycrystalline silicon film containing impurities for thermal diffusion, absorbing or absorbing heat on the second polycrystalline silicon film. Forming a film that reflects and equalizes the temperature below the film, and heating the first and second polycrystalline silicon films to remove the impurities from the first and second polycrystalline silicon films; The first and second polycrystalline silicon films are thermally diffused in the film to make the first and second polycrystalline silicon films conductive, and the impurities are diffused into the opening region of the one-conductivity-type semiconductor substrate. Forming an impurity diffusion region.

In the present invention, the step of forming a film on the second polycrystalline silicon film for absorbing or reflecting heat and making the temperature below the second polycrystalline silicon film uniform with respect to the heating is performed by the second polycrystalline silicon film. It is preferable to include a step of forming a film made of silicon carbide, amorphous silicon, titanium, or TiON on the silicon film.

According to the present invention, after the step of forming a film which absorbs or reflects heat on the second polycrystalline silicon film and makes the temperature below the film uniform with respect to heating, the heat is absorbed or reflected. More preferably, the method further includes a step of forming an impurity diffusion preventing layer on the film which reflects and makes the temperature below the film uniform with respect to heating.

Further, in the present invention, the step of forming an impurity diffusion preventing layer on the step of forming a film that absorbs or reflects the heat and makes the temperature below the film uniform with respect to heating includes the step of: More preferably, the method further includes a step of forming a film made of silicon oxide on a film made of a material that absorbs or reflects light.

Further, the present invention provides the first and second embodiments.
Heating the polycrystalline silicon film to thermally diffuse the impurities into the first and second polycrystalline silicon films to make the first and second polycrystalline silicon films conductive, and Forming an impurity diffusion region in the one-conductivity-type semiconductor substrate by diffusing into the opening region of the conduction-type semiconductor substrate; heating the first and second polycrystalline silicon films; Heating the first and second polycrystalline silicon films by heating using a semiconductor heat treatment apparatus.

That is, the present invention is a method for manufacturing a semiconductor device in which a bipolar transistor and a polycrystalline silicon resistor are simultaneously formed on the same semiconductor substrate.

According to the present invention, a heat conductive material such as polysilicon, silicon carbide (SiC), titanium, or the like is formed on an impurity-doped insulating film via an impurity diffusion preventing layer such as an insulating film. The method is characterized in that after forming a film made of a material, a heat treatment is performed on an insulating film doped with impurities.

Accordingly, a polycrystalline silicon resistor having a uniform impurity diffusion layer and a uniform resistance (uniformly doped with impurities), a highly accurate polycrystalline silicon resistor with a very small variation in Vf value, and a bipolar transistor are provided. A semiconductor device can be manufactured.

[0050]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in more detail with reference to embodiments of the present invention. First Embodiment A first embodiment of the present invention is an example of forming a polysilicon resistor in which impurities are uniformly diffused and activated. Less than,
Description will be made with reference to the drawings. First, FIG.
As shown in FIG. 1, an insulating film 2 such as a silicon oxide film is formed on a silicon semiconductor substrate 1 of one conductivity type (p-type or n-type). Note that a plurality of insulating films 2 may be formed.

Next, a film 3 made of polycrystalline silicon doped with impurities is formed in a predetermined thickness, and is processed into a predetermined shape by a technique of photolithography and etching. As a method of introducing impurities into the polycrystalline silicon, a method of depositing polycrystalline silicon containing an n-type or p-type impurity in advance by, for example, a CVD method or a vapor deposition method, or a method of depositing polycrystalline silicon After n
And a method of implanting a p-type impurity by ion implantation. Note that phosphorus or arsenic can be exemplified as the n-type impurity, and boron can be exemplified as the p-type impurity.

Next, an impurity diffusion preventing layer 4 such as an insulating film is formed on the entire surface so as to cover the polycrystalline silicon film 3.
The impurity diffusion preventing layer 4 is preferably made of a material having excellent thermal conductivity and heat resistance, such as silicon oxide. The impurity diffusion preventing layer 4 is provided to prevent diffusion of the impurity from diffusing into the film 5 made of a material that absorbs or reflects heat formed later.

Further, on the impurity diffusion preventing layer 4,
A film 5 that absorbs or reflects heat and equalizes the temperature below the film 5 with respect to heating is formed on the entire surface. As a material constituting the film 5 that absorbs or reflects the heat and makes the temperature below the film uniform with respect to heating, for example, it absorbs heat such as silicon carbide, amorphous silicon, and titanium, and has excellent heat conductivity. A material that reflects heat and has low thermal conductivity, such as a substance or TiON, can be given.

The silicon carbide film is made of, for example, SiC
l ₄ + C ₃ H ₈ + H ₂ , SiH ₄ + C ₃ H ₈ + H ₂ , S
iHCl ₃ + C ₃ H ₈ + H ₂ , SiH ₄ + C ₂ H ₄ + H
_The film can be formed by a thermal CVD method using a mixed gas such as ₂ . The amorphous silicon film is made of, for example, SiH
It can be formed by a CVD method using _four gases.
The TiON film can be obtained, for example, by forming titanium by a sputtering method in the presence of an O ₂ + N ₂ mixed gas.

The thickness of the film that absorbs or reflects the heat and makes the temperature below the film uniform with respect to the heating is not particularly limited, and can be set freely within a range where the effects of the present invention can be obtained. it can.

Thereafter, the substrate is subjected to a heat treatment using a lamp type semiconductor heat treatment apparatus. This heat treatment is performed by, for example, using a ramp-type semiconductor heat treatment apparatus and
200 ° C., preferably at 900 to 1100 ° C. for 5 seconds to 2
It is preferable to heat for about an hour.

By the heat treatment, impurities contained in the polycrystalline silicon film 3 are uniformly activated, and a polycrystalline silicon resistor having a predetermined resistance value is obtained.

Next, as shown in FIG. 2C, the film 5 which absorbs or reflects the heat and makes the temperature below the film 5 uniform by heating is removed by etching. For example, in the case of a silicon carbide film, the film 5 that absorbs or reflects the heat and makes the temperature below the film uniform with respect to the heating is, for example, dry etching using a CHF ₃ —O ₂ -based etching gas. In the case of an amorphous silicon film by etching or the like, for example, it can be performed by wet etching using an HF-containing aqueous solution, a mixed solution of ethylenediamine-pyrocatechol, or plasma etching using a fluorine-containing compound such as CF ₄ .

For etching the titanium or TiON film, for example, CHF ₃ / SF _{6 is used} as an etching gas.
/ He-based gas or BCl ₃ / Cl ₂ -based gas and a plasma etching apparatus.

Next, after forming a resist film (not shown),
A predetermined patterning is performed, and an opening is formed in a portion where a wiring layer is formed by etching.

Finally, as shown in FIG. 2D, after a wiring material such as aluminum or an aluminum alloy is deposited so as to fill the opening, a predetermined processing is performed to form a wiring layer 6. be able to.

The polycrystalline silicon resistor 3 'formed as described above absorbs or reflects heat on the outermost surface of the substrate, and forms a film for lowering the temperature under heating to make the surface uniform. Due to the effect that the heat from the substrate is uniformly applied to the lower layer or below, a high-precision polycrystalline silicon resistor having little variation in resistance value due to pattern dependence is obtained.

Second Embodiment A second embodiment of the present invention is an example in which the method of manufacturing a semiconductor device of the present invention is applied to the manufacture of a semiconductor device having an NPN transistor. FIG. 7 is a structural sectional view of an NPN Tr portion manufactured by the method of manufacturing a semiconductor device according to the present embodiment in which an NPN transistor is formed on a semiconductor substrate.

In FIG. 7, the NPN Tr has an n ⁺ buried diffusion layer 102 at a predetermined position on a p-type silicon semiconductor substrate 101 and an n-type epitaxial layer 105 above the buried diffusion layer 102. The active region of the L-PNP Tr is They are separated by an element separation film 104. Further, the element isolation film 10
4, an element isolation diffusion layer 103 for isolating the transistor from an adjacent transistor is provided.

The base electrode 118a of the NPN Tr is connected to the graft base layer 116, which is a p-type impurity diffusion region, via the polycrystalline silicon layer (first conductive film) 108, and the emitter electrode 118b is Layer (second
Through a conductive film 112) and an emitter region 117 which is an n-type impurity diffusion region. The collector electrode 118c is connected to the n-type buried layer 102 via the n-type diffusion layer 107.

The semiconductor device manufactured according to the present embodiment shown in FIG. 7 includes a graft base layer 116 formed by the manufacturing method of the present invention described later and in which impurities are uniformly diffused.
Since the semiconductor device has the emitter region 117 and the p ⁺ polycrystalline silicon layer 108, the semiconductor device has a high-precision and high-performance NPN transistor.

Next, an example of manufacturing the semiconductor device shown in FIG. 7 will be described in detail with reference to the drawings.

First, the process up to FIG. 3A will be described.
That is, an n-type buried layer 102 is formed in a p-type silicon semiconductor substrate 101 by a high concentration n-type impurity by a vapor phase diffusion method or the like. The n-type buried layer 102 is, for example, 1200 ° C.
It can be formed by a vapor phase diffusion method of Sb using Sb ₂ O ₃ or the like.

Thereafter, a silicon oxide film 104 is formed in a predetermined region of the semiconductor substrate 101 by, for example, the LOCOS method, and a film having a resistivity of about 0.3 to 5.0 Ωcm is formed in a region separated by the silicon oxide film 104. 0.7 ~
An n-type epitaxial layer 105 of about 2.0 μm is formed. For example, the n-type epitaxial layer 105
By heating to about 200 ° C., for example, arsine (As
C using a gas containing H ₃ ) or phosphine (PH ₃ )
It can be formed by a VD method.

Next, an element isolation diffusion layer 103 is formed below the silicon oxide film 104 by, for example, isolation diffusion. The element isolation diffusion layer 103 is formed to isolate the active region of an adjacent transistor. Further, CVD (Chemical Vapor De)
silicon oxide film 106 by a method such as a position method.
Is deposited on the entire surface with a thickness of about 50 to 200 nm. As described above, the state shown in FIG. 1A is obtained.

Next, as shown in FIG. 3B, an active region of the semiconductor substrate 101 is selectively opened, and polycrystalline silicon is formed by, eg, CVD method to a thickness of 80 to 250 nm.
m and deposited on the entire surface. Further, boron is ion-implanted into the opening as an impurity, and processed by a dry etching method using a photolithography technique.
N Tr diffusion source extraction Kengaibu based p ⁺ region of the base electrode, and L-PNP Tr becomes a diffusion source of the p ⁺ region of the extraction and emitter and collector electrodes of the extraction and the collector electrodes of the emitter electrode of the p ⁺ multi A crystalline silicon layer 108 is formed.

Thereafter, as shown in FIG. 4C, a first insulating film 109 such as a silicon oxide film is
Formed over the entire surface by D method. Further, the resist film 110
After forming a film and performing predetermined patterning, NPN
The first insulating film 1 for forming the base region 111 of Tr
Opening is performed by isotropic ion etching of the 09 and p ⁺ polysilicon layers 108 until the epitaxial layer 102 is exposed.

Next, as shown in FIG. 4D, boron (B ⁺ or BF ₂ ⁺ ) for forming the base region 111 of the NPN Tr is ion-implanted into the opening 111 '. In this step, for example, 5.0 × 10 ^{11 to} 5.0 × 10 ¹⁴ / cm at an energy of 5 keV to 100 keV.
Boron with a dose of about ² or 5 keV to 20
At an energy of 0 keV, 5.0 × 10 ^{11 to} 5.0 × 1
This can be performed by ion-implanting BF ₂ at a dose of about 0 ¹⁴ / cm ² .

Next, after the resist film 110 is removed, a second insulating film such as a silicon oxide film (not shown) is formed to a thickness of 400 to 1000 nm by, for example, a CVD method, and RIE (Reactive Ion Etch) is performed.
The sidewalls 113 are formed by etching back by the ng) method.

Subsequently, polycrystalline silicon containing an n-type impurity such as As or P is deposited by, for example, a CVD method so that the polycrystalline silicon layer 112 has a thickness of 100 nm.
It is formed with a thickness of 200 nm. In this case, after polycrystalline silicon containing no impurities is deposited, for example, n such as As or P is deposited.
The polycrystalline silicon layer 112 can also be formed by ion-implanting a type impurity. As described above,
The state diagram shown in FIG.

Next, an insulating film 114 such as a silicon oxide film is formed on the polycrystalline silicon layer 115 to a thickness of 200 to 400 nm by, for example, a CVD method. Insulating film 114
Is provided in order to prevent impurities in the polycrystalline silicon layer 114 from absorbing or reflecting heat formed in a later step and diffusing into a film 115 that uniforms the temperature under the heat. .

Subsequently, a film 115 made of a material that absorbs heat, conducts, absorbs, or reflects heat is formed on the insulating film 114 to a thickness of 300 to 500 nm. As a material that absorbs or reflects the heat and makes the temperature of the lower portion uniform with respect to heating, for example, it absorbs heat of silicon carbide (SiC), amorphous silicon, titanium, or the like, and forms the lower portion with respect to heating. Examples of the material include a material for equalizing the temperature, a material that absorbs or reflects heat, such as TiON, and equalizes the temperature under the heating.

The silicon carbide film is made of, for example, SiC
l ₄ + C ₃ H ₈ + H ₂ , SiH ₄ + C ₃ H ₈ + H ₂ , S
iHCl ₃ + C ₃ H ₈ + H ₂ , SiH ₄ + C ₂ H ₄ + H
_The film can be formed by a thermal CVD method using a mixed gas such as ₂ . The amorphous silicon film is made of, for example, SiH
It can be formed by a CVD method using _four gases.
The TiON film can be obtained, for example, by forming titanium by a sputtering method in the presence of an O ₂ + N ₂ mixed gas.

Thereafter, heat treatment is performed at about 600 to 900 ° C., and then 700 to 12
A heat treatment at about 00 ° C. is performed for about 5 seconds to 2 hours. By this heat treatment, p ^{+ is} added to the epitaxial layer 102 by impurity diffusion from the polycrystalline silicon layer 108 for taking out the emitter of the NPN Tr portion and taking out the base electrode.
A region (graft base diffusion layer) 116 is formed. Further, n-type impurities are diffused from n ⁺ polycrystalline silicon layer 112 into epitaxial layer 105 to form emitter region 11.
7 is formed. As described above, the state shown in FIG.

Next, as shown in FIG. 6G, the film 115 made of a material that conducts, absorbs or reflects heat after absorbing heat, and the insulating film 114 are removed by etching. As a condition for etching a film made of a material that conducts, absorbs, or reflects heat after absorbing the heat, the same conditions as those exemplified in the process of manufacturing the polysilicon resistor of the first embodiment can be used.

Thereafter, as shown in FIG. 6H, the polycrystalline silicon layer 112 doped with an n-type impurity is processed by a photolithography technique and a dry etching method.

Then, the collector electrode portion and the base electrode portion of the NPN Tr are opened, and a barrier metal layer made of titanium or the like and a conductive layer made of aluminum or an aluminum alloy are formed by, for example, a CVD method, a vapor deposition method, or a sputtering method. Lamination, photoresist technology and R
By processing by the IE method, the base electrode 118a, the emitter electrode 118b, and the collector electrode 118c of the NPN Tr can be respectively formed.

As described above, the NP shown in FIG.
A semiconductor device having NTr can be manufactured.

According to this embodiment, by forming a film that absorbs or reflects heat on the outermost surface of the substrate and makes the temperature below the substrate uniform with respect to the heating, the heat from the surface becomes uniform below the lower layer. Of the base electrode of the NPN Tr (polycrystalline silicon film 108), the graft base diffusion layer 116 and the emitter region 117 are uniformly diffused and thermally diffused and activated. It is formed from silicon. Therefore, it is possible to obtain a semiconductor device having a high-precision and high-performance NPN Tr with little variation in the Vf value.

The present invention has been described in detail with reference to the embodiments. However, the present invention is not limited to the embodiments and can be applied to various semiconductor device manufacturing without departing from the gist of the present invention. . In the above embodiments, the manufacturing examples of the semiconductor device having the polycrystalline silicon resistor and the NPN Tr are shown, respectively, but the semiconductor device having the horizontal PNP transistor and the vertical PNP transistor, the semiconductor device having the NPN transistor and the PNP transistor, The present invention can be preferably applied to the manufacture of a semiconductor device having a bipolar transistor and a MOS transistor, a semiconductor device having a polycrystalline silicon resistor and a bipolar transistor on the same semiconductor substrate, and the like.

[0086]

As described above, according to the method of forming a conductive portion of the present invention, polysilicon, silicon carbide (SiC) is formed on an impurity-doped insulating film via an impurity diffusion preventing layer such as an insulating film. ) Or titanium, TiON, etc., is characterized by the step of forming a film that absorbs or reflects heat and makes the temperature below the film uniform with respect to heating, and then heat-treats the insulating film doped with impurities. .

That is, after a film made of a material such as polysilicon, silicon carbide, titanium or the like which easily absorbs heat and has good heat conductivity is formed on an insulating film such as a polysilicon film doped with impurities, the substrate is formed. When the heat treatment is performed, the speed of arrival of heat due to the difference in the vertical structure pattern is reduced, and a uniform heat treatment can be performed on the entire insulating film such as a doped polysilicon film.

When a film made of a material having low thermal conductivity such as TiON is formed, heat is uniformly transmitted from the back surface of the substrate, not from the vertical structure side (substrate surface side) having a pattern difference. Since non-uniform heat conduction depending on the substrate pattern is eliminated, uniform heat treatment can be performed on the entire substrate as a result.

Therefore, a conductive polycrystalline silicon film or a polycrystalline silicon resistor having a uniform resistance (uniformly doped with impurities) can be formed.

Further, according to the method of manufacturing a semiconductor device of the present invention, a polycrystalline silicon resistance or impurity diffusion in which impurities are uniformly diffused and activated by the same operation as in the method of forming a conductive portion of the present invention. A conductive film such as a region and a conductive region can be formed.

Therefore, it is possible to manufacture a semiconductor device having a highly accurate polycrystalline silicon resistor with less variation in resistance and a highly accurate and high performance NPN Tr with less variation in Vf value.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing main steps of manufacturing a semiconductor device having a polysilicon resistor by a method of manufacturing a semiconductor device according to the present invention.

FIG. 2 is a cross-sectional view showing main steps of manufacturing a semiconductor device having a polysilicon resistor by the method for manufacturing a semiconductor device of the present invention.

FIG. 3 is a cross-sectional view showing main processes of manufacturing a semiconductor device on which an NPN transistor is mounted by a method of manufacturing a semiconductor device according to the present invention.

FIG. 4 is a cross-sectional view showing main processes of manufacturing a semiconductor device on which an NPN transistor is mounted by the method for manufacturing a semiconductor device of the present invention.

FIG. 5 is a cross-sectional view showing main processes of manufacturing a semiconductor device on which an NPN transistor is mounted by the method for manufacturing a semiconductor device of the present invention.

FIG. 6 is a cross-sectional view showing main processes of manufacturing a semiconductor device on which an NPN transistor is mounted by the method for manufacturing a semiconductor device of the present invention.

FIG. 7 is a cross-sectional view of an NPN Tr portion of the semiconductor device of the present invention, which is a semiconductor device mounted with an NPN transistor manufactured by the method of manufacturing a semiconductor device of the present invention.

FIG. 8 is a cross-sectional view showing main processes of manufacturing a semiconductor device on which an NPN transistor is mounted by a conventional method for manufacturing a semiconductor device.

FIG. 9 is a cross-sectional view showing main processes of manufacturing a semiconductor device on which an NPN transistor is mounted by a conventional method for manufacturing a semiconductor device.

FIG. 10 is a cross-sectional view showing main processes of manufacturing a semiconductor device on which an NPN transistor is mounted by a conventional method for manufacturing a semiconductor device.

FIG. 11 shows that the difference in the distribution of impurities in polycrystalline silicon when viewed microscopically, that is, the difference in the film structure causes a difference in the speed of heat reaching the inside of the wafer during the heat treatment. FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... One conductivity type semiconductor substrate, 2 ... Insulating film, 3 ... Polycrystalline silicon film doped with impurities, 6 ... Wiring layer, 101,
201 ... p-type silicon semiconductor substrate, 102, 202 ... n
Mold buried layer, 103, 203 ... element isolation diffusion layer, 10
4,204: element isolation film, 105, 205: n-type epitaxial layer, 106, 206: first insulating film, 107,
207... N-type diffusion layer, 108, 208... Polycrystalline silicon film (first conductive film), 108 ′, 208 ′... P ⁺ polycrystalline silicon film (first conductive film), 109, 209. , 110, 210 ... resist film, 111 ', 211'
... Openings, 111, 211 ... Intrinsic base region, 112,
212 ... polycrystalline silicon film (second conductive film), 113,
213: sidewalls, 4, 114, 214: impurity diffusion preventing layer, 5, 115: films for absorbing or reflecting heat and making the temperature below the film uniform with respect to heating, 116, 216
... Graft base diffusion layer, 117,217 ... Emitter region, 118,218a ... Base electrode, 118b, 218
b: emitter electrode, 118c, 218c: collector electrode, A: impurity, B: polycrystalline silicon

Claims (17)

[Claims] 1. A step of forming an insulating film containing impurities for thermal diffusion on a substrate, and forming a film on the insulating film for absorbing or reflecting heat and making the temperature below the film uniform with respect to heating. And a step of heating the insulating film to thermally diffuse the impurities into the insulating film to make the insulating film conductive. 2. The step of forming a film on the insulating film that absorbs or reflects heat and makes the temperature below the film uniform with respect to heating, comprises forming a film of silicon carbide, amorphous silicon, titanium or titanium on the insulating film. The conductive part forming method according to claim 1, further comprising a step of forming a film made of TiON. 3. The step of forming an insulating film containing impurities for thermal diffusion on the substrate includes the step of forming a layer made of polycrystalline silicon doped with impurities on the substrate. Conductive part forming method. 4. After the step of forming a film that absorbs or reflects heat on the insulating film and makes the temperature below the film uniform with respect to heating, absorbs or reflects heat on the insulating film and heats the film. 2. The method according to claim 1, further comprising the step of forming an impurity diffusion preventing layer on a film for lowering the temperature of the impurity diffusion layer. 5. The step of heating said insulating film to thermally diffuse said impurities into said insulating film to make said insulating film conductive, wherein said step of heating said insulating film using a ramp type semiconductor heat treatment apparatus. The conductive part forming method according to claim 1, comprising: 6. A method of manufacturing a semiconductor device having a bipolar transistor, comprising: forming a first insulating film on a conductive semiconductor substrate; and etching the first insulating film to form a predetermined region. An opening step, a step of forming a second insulating film containing a thermal diffusion impurity, a step of forming a third insulating film over the entire surface of the second insulating film, and the third and second steps And a step of opening a predetermined region by etching the first insulating film; a step of forming a fourth insulating film containing a thermal diffusion impurity; and absorbing or reflecting heat on the fourth insulating film. Forming a film that equalizes the temperature of the lower portion with respect to the heating; and heating the second and fourth insulating films to transfer the impurities into the second and fourth insulating films. Diffuse to the second
And making the fourth insulating film conductive, and diffusing the impurity into the opening region of the one conductivity type semiconductor substrate, thereby forming an impurity diffusion region in the one conductivity type semiconductor substrate. Device manufacturing method. 7. The step of forming a second insulating film containing an impurity for thermal diffusion on the first insulating film is made of polycrystalline silicon doped with an impurity on the first insulating film. The method for manufacturing a semiconductor device according to claim 6, further comprising a step of forming a layer. 8. The method of manufacturing a semiconductor device according to claim 6, wherein the step of forming the second insulating film containing impurities includes a step of forming a layer made of polycrystalline silicon doped with impurities on the entire surface. Method. 9. A step of forming a film on the fourth insulating film that absorbs or reflects heat and equalizes the temperature below the fourth insulating film, the step of forming a film on the second conductive film Silicon carbide, amorphous silicon, titanium or TiO
The method for manufacturing a semiconductor device according to claim 6, further comprising a step of forming a film made of N. 10. The method according to claim 1, further comprising: forming a film on the second insulating film that absorbs or reflects heat so as to make the temperature below the second insulating film uniform, thereby absorbing the heat. 7. The method of manufacturing a semiconductor device according to claim 6, further comprising a step of forming an impurity diffusion preventing layer on a film which reflects and makes the temperature lower under the heating uniform. 11. The method according to claim 6, wherein the step of forming the impurity diffusion preventing layer includes the step of forming a film made of silicon oxide. 12. The step of heating the second and fourth insulating films includes a step of heating the second and fourth insulating films by heating using a ramp-type semiconductor heat treatment apparatus. Item 7. A method for manufacturing a semiconductor device according to Item 6. 13. A method for manufacturing a semiconductor device having a bipolar transistor and a polycrystalline silicon resistor, comprising: forming a first insulating film on a conductive semiconductor substrate; and etching the first insulating film. Opening a predetermined region, forming a first polycrystalline silicon film containing a thermal diffusion impurity, and forming a second insulating film on the entire surface of the first polycrystalline silicon film. A step of etching the second insulating film, the polycrystalline silicon film, and the first insulating film to open a predetermined region; and forming a second polycrystalline silicon film containing impurities for thermal diffusion. Absorbing and reflecting heat on the second polycrystalline silicon film;
Forming a film for equalizing the temperature of the lower portion thereof with respect to heating; and heating the first and second polycrystalline silicon films to remove the impurities from the first and second polycrystalline silicon films. By thermally diffusing the first and second polycrystalline silicon films into a polycrystalline silicon film to make the first and second polycrystalline silicon films conductive and diffusing the impurities into the opening region of the one-conductivity-type semiconductor substrate, Forming an impurity diffusion region in a semiconductor substrate. 14. The step of forming a film on the second polycrystalline silicon film which absorbs or reflects heat and equalizes the temperature below the second polycrystalline silicon film. 14. The method of manufacturing a semiconductor device according to claim 13, further comprising a step of forming a film made of silicon carbide, amorphous silicon, titanium, or TiON thereon. 15. After the step of forming a film on the second polycrystalline silicon film that absorbs or reflects heat and makes the temperature below the film uniform with respect to heating, absorbs or reflects the heat,
14. The method of manufacturing a semiconductor device according to claim 13, further comprising a step of forming an impurity diffusion preventing layer on a film for making the temperature below the film uniform with respect to heating. 16. The method according to claim 13, wherein the step of forming the impurity diffusion preventing layer includes a step of forming a film made of silicon oxide. 17. The first and second polycrystalline silicon films are heated to thermally diffuse the impurities into the first and second polycrystalline silicon films so that the first and second polycrystalline silicon films are diffused. By making the silicon film conductive, by diffusing the impurity into the opening region of the one conductivity type semiconductor substrate,
14. The step of forming an impurity diffusion region in the one conductivity type semiconductor substrate includes a step of heating the first and second polycrystalline silicon films by heating using a ramp-type semiconductor heat treatment apparatus. The manufacturing method of the semiconductor device described in the above.