JPS61102059A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61102059A JPS61102059A JP22461084A JP22461084A JPS61102059A JP S61102059 A JPS61102059 A JP S61102059A JP 22461084 A JP22461084 A JP 22461084A JP 22461084 A JP22461084 A JP 22461084A JP S61102059 A JPS61102059 A JP S61102059A
- Authority
- JP
- Japan
- Prior art keywords
- film
- region
- silicide
- titanium
- opening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 10
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 229910021341 titanium silicide Inorganic materials 0.000 claims description 11
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 10
- 239000010936 titanium Substances 0.000 claims description 10
- 238000009792 diffusion process Methods 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229910021332 silicide Inorganic materials 0.000 abstract description 19
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 abstract description 19
- 238000010438 heat treatment Methods 0.000 abstract description 6
- 239000012299 nitrogen atmosphere Substances 0.000 abstract description 4
- 150000002500 ions Chemical class 0.000 abstract description 2
- 239000012535 impurity Substances 0.000 abstract 2
- 150000004767 nitrides Chemical class 0.000 abstract 2
- 239000002344 surface layer Substances 0.000 abstract 2
- 230000004888 barrier function Effects 0.000 description 9
- 229910052782 aluminium Inorganic materials 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 241000238557 Decapoda Species 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000012298 atmosphere Substances 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- -1 boron ions Chemical class 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000035484 reaction time Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
（技術分野）
本発明は、半導体装置に係り、特に超浅接合上にシリサ
イドとバリヤメタルを有する半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a semiconductor device, and particularly to a semiconductor device having silicide and barrier metal on an ultra-shallow junction.
（従来技術）
従来、接触抵抗の低い電極としてシリサイドが用いられ
ている。しかし、このシリサイド電極を用いた場合、前
記シリサイド上に直接配線材料としてのアルミをおくと
、その後の熱処理でシリサイドとアルミ間の反応が生じ
、シリサイド下の接合のリークをもたらす為、通常は、
シリサイドとアルミ間にバリヤメタルを入れる必要があ
るとされている。しかしこの方法でも、シリサイド形成
からバリヤ膜形成までシリサイド表面は大気中に晒され
る為シリサイドとバリヤ膜間の接触抵抗が増大したり、
プロヤス上の煩雑さが問題となっていた。(Prior Art) Silicide has conventionally been used as an electrode with low contact resistance. However, when using this silicide electrode, if aluminum as a wiring material is placed directly on the silicide, a reaction between the silicide and aluminum will occur during subsequent heat treatment, resulting in leakage of the junction under the silicide.
It is said that it is necessary to insert a barrier metal between the silicide and aluminum. However, even with this method, the silicide surface is exposed to the atmosphere from the silicide formation to the barrier film formation, so the contact resistance between the silicide and the barrier film increases.
The complexity of Proyas was a problem.
（発明の目的）
本発明の目的は、従来技術の問題点を除き、熱的に安定
し、かつ接触抵抗の低い電極構造を有する半導体装置を
提供する事にある。(Object of the Invention) An object of the present invention is to provide a semiconductor device having an electrode structure that is thermally stable and has low contact resistance, while eliminating the problems of the prior art.
（発明の構成）
本発明の半導体装置は具体的には、複数の回路素子を含
むシリコン基板上に形成された半導体装置に於いて、前
記シリコン基板上に選択的に開孔を設けた絶縁膜を有し
、前記開孔部分にはチタン膜とシリコン基板との熱反応
により形成されたチタンシリサイド膜を有し、該チタン
シリサイド膜の直下には、−導を型の拡散層を有し、更
にチタンシリサイド膜直上には前記チタンシリサイド形
成反応時に残した未反応チタン膜を窒素雰囲気で熱処理
することにより形成された窒化チタン膜を有する事を特
徴とする。(Structure of the Invention) Specifically, the semiconductor device of the present invention is a semiconductor device formed on a silicon substrate including a plurality of circuit elements, and includes an insulating film in which holes are selectively formed on the silicon substrate. having a titanium silicide film formed by a thermal reaction between a titanium film and a silicon substrate in the opening portion, and having a − conductive type diffusion layer immediately below the titanium silicide film; Furthermore, a titanium nitride film is formed directly on the titanium silicide film by heat-treating the unreacted titanium film left during the titanium silicide forming reaction in a nitrogen atmosphere.
（発明の作用）
本発明によればシリサイド上にバリヤ膜が形成されてい
る為に熱的に安定であり、また同一膜の一部をシリサイ
ド膜に残りをバリヤ膜としている為に、シリサイド膜と
バリヤ膜との接触抵抗も低くすることができ、゛この電
極構造を集積回路に組み込むことにより、高速で高信頼
度の半導体装置が得られる。(Function of the invention) According to the present invention, since a barrier film is formed on the silicide, it is thermally stable, and since a part of the same film is a silicide film and the rest is a barrier film, the silicide film The contact resistance between the electrode structure and the barrier film can also be lowered, and by incorporating this electrode structure into an integrated circuit, a high-speed and highly reliable semiconductor device can be obtained.
（実施例）
本発明のバイポーラ型トランジスタに適用した一実施例
を図面を用いて説明する。(Example) An example applied to a bipolar transistor of the present invention will be described with reference to the drawings.
第１図〜第６図は、本発明の一実施例を工程順に示した
断面図である。1 to 6 are cross-sectional views showing an embodiment of the present invention in the order of steps.
まず第１図に示す様に、ｎＭエビ基板上に熱酸化膜１０
２を形成し、フォトレジスト１０４をマスクとし、ボロ
ンをイオン注入し、Ｐ型ベース拡散層１０３を形成する
。次にエミッタを形成すべき領域の酸化膜を７オトレジ
ストをマスクにし除去する、その後に、チタン膜２０１
を付着させる〔第２図〕。次に６００℃以上の温度で窒
素雰囲気中で熱処理をし、チタンシリサイド膜３０１を
形成する、この際未反応のチタン膜が残る様、シリサイ
ド反応時間をコントロールする、更にエミッタのＡｓ拡
散源としてチタンサイド及び未反応チタン膜中にＡｓを
イオン注入しておく〔第３図〕。First, as shown in Figure 1, a thermal oxide film 10 is deposited on an nM shrimp substrate.
Then, using the photoresist 104 as a mask, boron ions are implanted to form a P-type base diffusion layer 103. Next, the oxide film in the area where the emitter is to be formed is removed using a 7-photoresist as a mask, and then the titanium film 201 is removed.
(Figure 2). Next, heat treatment is performed in a nitrogen atmosphere at a temperature of 600°C or higher to form a titanium silicide film 301. At this time, the silicide reaction time is controlled so that an unreacted titanium film remains. Furthermore, titanium is used as an As diffusion source for the emitter. As ions are implanted into the side and unreacted titanium film [Fig. 3].
次に５００℃以下の温度で窒素雰囲気中で熱処理を施し
、未反応チタン膜を窒化チタン膜にする〔第４図〕。こ
の後に、シリサイド中に含まれているＡｓを高温熱処理
でシリコン中に拡散させｎ型エミッタ拡散層５０１を形
成する〔第５図〕。次に配線材料としてアルミ膜６０１
を付着しアルミ及び窒化チタン族を選択的に除去し電極
を形成する〔第６図〕。Next, a heat treatment is performed in a nitrogen atmosphere at a temperature of 500° C. or lower to turn the unreacted titanium film into a titanium nitride film (FIG. 4). Thereafter, As contained in the silicide is diffused into silicon by high-temperature heat treatment to form an n-type emitter diffusion layer 501 (FIG. 5). Next, aluminum film 601 is used as a wiring material.
The aluminum and titanium nitride groups are selectively removed to form electrodes (FIG. 6).
以上の実施例で実現されたものは、同一チタン膜から形
成されたチタンシリサイド膜と窒化チタン膜を層状に有
した構造になる。The structure realized in the above embodiments has a structure in which a titanium silicide film and a titanium nitride film formed from the same titanium film are layered.
（発明の効果）
本発明によれば、従来問題であった。シリサイド膜とア
ルミ膜の反応による特性劣化や、この反応を防ぐために
バリヤ膜を入れた場合のバリヤ膜とシリサイド膜との接
触抵抗の増大などの諸事項を解決でき、低接触抵抗、高
信頼度の電極を有する半導体装置を得ることができる。(Effects of the Invention) According to the present invention, this problem has been solved in the past. Problems such as characteristic deterioration due to the reaction between the silicide film and aluminum film and an increase in contact resistance between the barrier film and the silicide film when a barrier film is inserted to prevent this reaction can be resolved, resulting in low contact resistance and high reliability. It is possible to obtain a semiconductor device having electrodes.
第１図から第６図は、本発明の一実施例を工程順に示し
た断面図である。。
尚、図において、１０１・・・・・・ｎ型エビ基板、１
１０２・・・・・・シリ＝ｙｙ酸化ＪＬ １０３・・
・・・・ｐ型ベース拡散層、１０４・・・・・・フォト
レジスト、２０１・・・・・・チタン膜、３０１・・・
・・・チタンシリサイド膜、４０１・・・・・・窒化チ
タン膜、５０１・・・・・・ｎ型エミッタ拡散層、６０
１・・・・・・アルミ。
（１−ｉ、；：
第１四
榮２区
第３図
第４図
第５区
第６図1 to 6 are cross-sectional views showing an embodiment of the present invention in the order of steps. . In the figure, 101... n-type shrimp substrate, 1
102...Sili=yy oxidation JL 103...
...P-type base diffusion layer, 104...Photoresist, 201...Titanium film, 301...
...Titanium silicide film, 401...Titanium nitride film, 501...N-type emitter diffusion layer, 60
1...Aluminum. (1-i, ;: 1st Siryong 2nd ward Fig. 3 Fig. 4 5th ward Fig. 6
Claims (1)
、前記開孔部分にはチタン膜とシリコン基板との熱反応
により形成されたチタンシリサイド膜を有し、該チタン
シリサイド膜の直下には、一導電型の拡散層を有し、更
に前記チタンシリサイド膜上には窒化チタン膜を有する
事を特徴とする半導体装置。It has an insulating film with holes selectively formed on a silicon substrate, a titanium silicide film formed by a thermal reaction between a titanium film and a silicon substrate in the opening part, and a titanium silicide film formed directly below the titanium silicide film. A semiconductor device comprising a diffusion layer of one conductivity type, and further comprising a titanium nitride film on the titanium silicide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22461084A JPS61102059A (en) | 1984-10-25 | 1984-10-25 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22461084A JPS61102059A (en) | 1984-10-25 | 1984-10-25 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61102059A true JPS61102059A (en) | 1986-05-20 |
Family
ID=16816419
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22461084A Pending JPS61102059A (en) | 1984-10-25 | 1984-10-25 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61102059A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62290128A (en) * | 1986-06-10 | 1987-12-17 | Toshiba Corp | Manufacture of semiconductor device |
| JPS6312132A (en) * | 1986-07-03 | 1988-01-19 | Sony Corp | Manufacture of semiconductor device |
| JPS6324668A (en) * | 1986-07-17 | 1988-02-02 | Mitsubishi Electric Corp | Semiconductor device |
| JPS6384024A (en) * | 1986-09-26 | 1988-04-14 | Seiko Epson Corp | Manufacture of semiconductor device |
| JPS6419763A (en) * | 1987-01-22 | 1989-01-23 | Advanced Micro Devices Inc | Improved integrated circuit structure and method of forming improved integrated circuit structure |
| US5760475A (en) * | 1987-03-30 | 1998-06-02 | International Business Machines Corporation | Refractory metal-titanium nitride conductive structures |
-
1984
- 1984-10-25 JP JP22461084A patent/JPS61102059A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62290128A (en) * | 1986-06-10 | 1987-12-17 | Toshiba Corp | Manufacture of semiconductor device |
| JPS6312132A (en) * | 1986-07-03 | 1988-01-19 | Sony Corp | Manufacture of semiconductor device |
| JPS6324668A (en) * | 1986-07-17 | 1988-02-02 | Mitsubishi Electric Corp | Semiconductor device |
| JPS6384024A (en) * | 1986-09-26 | 1988-04-14 | Seiko Epson Corp | Manufacture of semiconductor device |
| JPS6419763A (en) * | 1987-01-22 | 1989-01-23 | Advanced Micro Devices Inc | Improved integrated circuit structure and method of forming improved integrated circuit structure |
| US5760475A (en) * | 1987-03-30 | 1998-06-02 | International Business Machines Corporation | Refractory metal-titanium nitride conductive structures |
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