JPH036844A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To narrow a width of an active region by restraining transverse diffusion of a channel stopper region below an element isolation region and to reduce a resistance of a substrate by providing a inversely inclined well below the active region. CONSTITUTION:A field insulating film 2 and a photoresist film 3 are laminated on a surface of a P-type semiconductor substrate 1. A semiconductor substrate in an active region 4 is exposed through photoetching method. Then, boron ions are implanted at an accelerating voltage which maximizes an impurity distribution near a bottom of the field insulating film 2. Boron ions are implanted deep also into the active region 4. After the photoresist film 3 is removed, heat treatment is carried out to activate implanted boron ions. A channel stopper region 5 is formed below the field insulating film 2, and a well region 6 whose impurity concentration distribution is inversely inclined is formed below the active region 4 simultaneously. According to this method, transverse diffusion can be restrained because heat treatment is not applied to the channel stopper region 5 for many hours.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of manufacturing a semiconductor integrated circuit suitable for high integration.

Conventional MXS type integrated circuits consist of so-called active regions that form elements and so-called isolation regions that electrically isolate the active regions. As integrated circuits become more highly integrated, the width of the isolation region tends to become smaller, and it is necessary to increase the impurity concentration of the isolation region in order to suppress the spread of a depletion layer into the isolation region.

Conventionally, the method of manufacturing a semiconductor integrated circuit for increasing the impurity concentration in the isolation region has been as described below.

FIGS. 3A to 3C show step-by-step cross-sectional views of a conventional method for manufacturing a semiconductor integrated circuit, and description will be made with reference to these drawings.

First, as shown in FIG. 3(a), a P-type semiconductor substrate 11
Silicon oxide film 12. Silicon nitride films 13 are formed by sequentially stacking them.

Next, as shown in FIG. 3(b), only the portion that will become the active region is covered with a photoresist film 14, and the silicon nitride film 14 is covered with a photoresist film 14.
3 is selectively etched away, and boron ions are implanted using the photoresist film 14 as a mask.

Next, as shown in FIG. 3C, after removing the photoresist film 14, the entire substrate is heat-treated in an oxidizing atmosphere to form a field oxide film 15.

By this heat treatment, the implanted boron ions are activated as impurities and diffused into the substrate 11 to form a channel stopper region 16 having a higher concentration than the substrate 11. Silicon nitride! The region covered by 1113 becomes the active region 17.

Thereafter, elements such as transistors are formed according to a normal semiconductor integrated circuit manufacturing method.

Problems to be Solved by the Invention In the conventional semiconductor integrated circuit manufacturing method as described above, if the width of the isolation region, that is, the field oxide film 15 is to be reduced in order to achieve high integration, the impurity concentration of the channel stopper region 16 must be reduced. However, in this case, when the field oxide film 15 is formed, the channel stopper region 16 will be diffused laterally due to thermal diffusion and will also enter the active region 17, resulting in a narrower effective width of the active region 17. As a result, the characteristics of the element change. For this reason, there is a problem that the width of the active region 17 is not very small after all, making it difficult to achieve high integration.

When the oxidation temperature is lowered to suppress the lateral diffusion of the channel stopper region 16, the viscosity of the silicon oxide film decreases, causing mechanical stress at the edge of the field oxide film 15, causing crystal defects in the substrate 11. This may cause leakage current, etc.

Means for Solving the Problems In order to solve the above-mentioned problems, the method for manufacturing a semiconductor integrated circuit of the present invention defines the surface of a semiconductor substrate into an active region and an isolation region, and forms a field insulating film on the isolation region. and a step of sequentially forming 8i layers of mask thin films, a step of implanting impurity ions into the active region and isolation region at an acceleration voltage that maximizes the impurity concentration near the bottom of the field insulating film, and the mask 1 film. This process consists of a step of etching away.

According to the method for manufacturing a semiconductor integrated circuit of the present invention, since impurities in the isolation region do not spread to the active region, both the active region and the isolation region can be miniaturized.

Embodiment An embodiment of the present invention will be described with reference to process cross-sectional views shown in FIGS. 1(a) to 1(d).

First, as shown in FIG. 1(a), a field insulating film 2 and a photoresist film 3 having a thickness of 200 to 300 nm are laminated on the surface of a P-type semiconductor substrate 1, and then a well-known photoetching method is used. The semiconductor substrate in the active region 4 is exposed.

Next, as shown in FIG. 1(b), the field insulating film 2
Boron ions are implanted at an acceleration voltage that maximizes the impurity distribution near the bottom of the ion. At this time, boron ions are also deeply implanted into the active region 4.

Next, as shown in FIG. 1C, after removing the photoresist film 3, heat treatment is performed to activate the implanted boron ions, and a channel stopper region 5 is formed under the field insulating film 2. Further, under the active region 4, four well regions 6 having an inverse slope γI are formed at the same time by four impurity concentrations.

The depth distribution of impurities at this point is shown in FIG. As shown in the figure, the impurity distribution under the active region is maximum in the deep part, and is sufficiently low at the surface, so that it is easy to adjust it in a later process.

Thereafter, elements such as transistors may be formed according to a normal semiconductor integrated circuit manufacturing method.

According to this method of manufacturing a semiconductor integrated circuit, channel stopper region 5 is not subjected to high-temperature, long-term heat treatment, so that lateral diffusion can be suppressed. Furthermore, since the ions are implanted sufficiently deeply in the active region 4, the influence on the impurity concentration near the surface is small. Furthermore, the existence of the reversely inclined well region 6 lowers the resistance of the substrate 1, so that so-called latch-up is suppressed in the complementary MIS integrated circuit.

The thickness of the field insulating film 2 can be selected by adjusting the thickness of the photoresist film 3 regardless of the acceleration voltage of ion implantation.

In the embodiment shown in FIG. 1, the photoresist I]ii3 is used as the film on the field insulating film 2, but the photoresist I]ii3 is not limited to this. Any film having the above-mentioned properties may be used.

Further, the activation heat treatment may be performed concurrently with the heat treatment for forming elements such as transistors.

Further, in the embodiment, a P-type semiconductor substrate is used for convenience of explanation, but the same method can be applied to an N-type semiconductor substrate by selecting the ion species and the implantation acceleration voltage.

There is no need to follow the examples regarding film thickness, etc.

Effects of the Invention According to the method for manufacturing a semiconductor integrated circuit of the present invention, the element molecule i! Since lateral diffusion of the channel stopper region below the region can be suppressed, the width of the active @ region can be narrowed. Furthermore, since a reversely inclined well is formed under the active region, the resistance of the substrate can be lowered.

As a result, highly integrated semiconductor integrated circuits can be manufactured.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing an embodiment of the method for manufacturing a semiconductor integrated circuit according to the present invention, FIG.
The figure is a cross-sectional view showing a conventional method for manufacturing a semiconductor integrated circuit. DESCRIPTION OF SYMBOLS 1... P-type semiconductor substrate, 2... Field insulating board, 3... Photoresist film, 4...
. . . Active region, 5 . . . Channel stopper region, 6 . . . Reverse inclined well region.

Claims (1)

[Claims] defining a surface of the semiconductor substrate into an active region and an isolation region;
A step of sequentially stacking a field insulating film and a mask thin film on the isolation region, and implanting impurity ions into the active region and the isolation region using an accelerating voltage that maximizes the impurity concentration near the bottom of the field insulating film. A method for manufacturing a semiconductor integrated circuit, comprising the steps of: etching away the mask thin film.