JPS604033U - Logic circuit using complementary transistors - Google Patents
Logic circuit using complementary transistorsInfo
- Publication number
- JPS604033U JPS604033U JP9620683U JP9620683U JPS604033U JP S604033 U JPS604033 U JP S604033U JP 9620683 U JP9620683 U JP 9620683U JP 9620683 U JP9620683 U JP 9620683U JP S604033 U JPS604033 U JP S604033U
- Authority
- JP
- Japan
- Prior art keywords
- logic circuit
- transistors
- series connection
- conductivity type
- inverter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のコンパレータ回路の例を示す回路図であ
る。第2図は本考案の一実施例であるコンパレータ回路
を示す回路図である。
1、 1’、 3. 3’、 6. 7・・・・・
・Pチャネル型トランジスタ、2. 2’、 4.
4’、 8. 9・・・・・・Nチャネル型トランジ
スタ、10. 11. 12゜13・・・・・・インバ
ータ回路、14.14’・・・・・・基準電源。FIG. 1 is a circuit diagram showing an example of a conventional comparator circuit. FIG. 2 is a circuit diagram showing a comparator circuit which is an embodiment of the present invention. 1, 1', 3. 3', 6. 7...
・P-channel transistor, 2. 2', 4.
4', 8. 9...N-channel transistor, 10. 11. 12゜13...Inverter circuit, 14.14'...Reference power supply.
Claims (3)
回路を含む論理回路部と、前記直列接続の二環に接続さ
れ、前記論理回路部に与えられる入力信号を少なくとも
1つのインバータを介して受ける一導電型のトランジス
タと、前記直列接続の他端に接続され、前記論理回路部
に与えられる入力信号を少くとも1つのインバータを介
して受ける他の導電型のトランジスタとを含むことを特
徴とする相補型トランジスタを用いた論理回路。(1) A logic circuit section including a circuit in which transistors of different conductivity types are connected in series, and a conductive circuit connected to two rings of the series connection and receiving an input signal applied to the logic circuit section via at least one inverter. and a transistor of another conductivity type connected to the other end of the series connection and receiving an input signal applied to the logic circuit section via at least one inverter. A logic circuit using transistors.
の直列接続の接続点が他方の直列接続のトランジスタの
一方に接続されてコンパレータを構成している実用新案
登録請求の範囲第1項記載の相補型トランジスタを用い
た論理回路。(2) The logic circuit section has two of the series connections, and the connection point of one series connection is connected to one of the transistors of the other series connection to form a comparator. A logic circuit using the complementary transistor according to item 1.
他の導電型のトランジスタは前記論理回路に与えられる
入力信号を2つのインバータを介して受け、前記他方の
直列接続に接続される一導電型および他の導電型のトラ
ンジスタは前記論理回路に与えられる入力信号を1つの
インバータを介して受ける実用新案登録請求の範囲第2
項記載の相補型トランジスタを用いた論理回路。(3) The transistors of one conductivity type and the other conductivity type connected to the one series connection receive input signals applied to the logic circuit via two inverters, and the transistors connected to the other series connection receive input signals applied to the logic circuit via two inverters. The transistors of one conductivity type and another conductivity type receive an input signal applied to the logic circuit through one inverter, as claimed in claim 2 of the utility model registration.
Logic circuit using complementary transistors described in Section 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9620683U JPS604033U (en) | 1983-06-22 | 1983-06-22 | Logic circuit using complementary transistors |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9620683U JPS604033U (en) | 1983-06-22 | 1983-06-22 | Logic circuit using complementary transistors |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS604033U true JPS604033U (en) | 1985-01-12 |
Family
ID=30229381
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9620683U Pending JPS604033U (en) | 1983-06-22 | 1983-06-22 | Logic circuit using complementary transistors |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS604033U (en) |
-
1983
- 1983-06-22 JP JP9620683U patent/JPS604033U/en active Pending
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