JPS6039980U - semiconductor integrated circuit - Google Patents

semiconductor integrated circuit

Info

Publication number
JPS6039980U
JPS6039980U JP13214983U JP13214983U JPS6039980U JP S6039980 U JPS6039980 U JP S6039980U JP 13214983 U JP13214983 U JP 13214983U JP 13214983 U JP13214983 U JP 13214983U JP S6039980 U JPS6039980 U JP S6039980U
Authority
JP
Japan
Prior art keywords
counter circuit
integrated circuit
semiconductor integrated
shift register
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13214983U
Other languages
Japanese (ja)
Inventor
長良 繁徳
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP13214983U priority Critical patent/JPS6039980U/en
Publication of JPS6039980U publication Critical patent/JPS6039980U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による半導体集積回路の一実施例を示す
回路図である。
FIG. 1 is a circuit diagram showing an embodiment of a semiconductor integrated circuit according to the present invention.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] カウンタ回路を有する論理集積回路において、前記カウ
ンタ回路の前段に、このカウンタ回路のビット数と同数
のビット数を持つシフトレジスタを設け、このシフトレ
ジスタの各ビット出力端子と前記カウンタ回路の各ロー
ドデータ入力端子をそれぞれ接続し、外部端子より前記
シフトレジスタにシリアルデータおよび前記カウンタ回
路にロード信号を入力することによって前記カウンタ回
路の状態を任意に設定できるように構成したことを特徴
とする半導体集積回路。
In a logic integrated circuit having a counter circuit, a shift register having the same number of bits as the number of bits of the counter circuit is provided before the counter circuit, and each bit output terminal of the shift register and each load data of the counter circuit are provided. A semiconductor integrated circuit characterized in that the state of the counter circuit can be arbitrarily set by connecting input terminals and inputting serial data to the shift register and a load signal to the counter circuit from external terminals. .
JP13214983U 1983-08-26 1983-08-26 semiconductor integrated circuit Pending JPS6039980U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13214983U JPS6039980U (en) 1983-08-26 1983-08-26 semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13214983U JPS6039980U (en) 1983-08-26 1983-08-26 semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS6039980U true JPS6039980U (en) 1985-03-20

Family

ID=30298527

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13214983U Pending JPS6039980U (en) 1983-08-26 1983-08-26 semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS6039980U (en)

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