JPS603148A - Substrate for single crystal silicon semiconductor device and manufacture thereof - Google Patents
Substrate for single crystal silicon semiconductor device and manufacture thereofInfo
- Publication number
- JPS603148A JPS603148A JP11134783A JP11134783A JPS603148A JP S603148 A JPS603148 A JP S603148A JP 11134783 A JP11134783 A JP 11134783A JP 11134783 A JP11134783 A JP 11134783A JP S603148 A JPS603148 A JP S603148A
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- single crystal
- crystal silicon
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 55
- 229910021421 monocrystalline silicon Inorganic materials 0.000 title claims abstract description 41
- 239000004065 semiconductor Substances 0.000 title claims abstract description 15
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 229910021332 silicide Inorganic materials 0.000 claims description 10
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 8
- 239000012212 insulator Substances 0.000 claims description 6
- 239000013078 crystal Substances 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 24
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 12
- 239000000377 silicon dioxide Substances 0.000 abstract description 12
- 238000000034 method Methods 0.000 abstract description 8
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 abstract description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 abstract description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 abstract description 2
- 229960000583 acetic acid Drugs 0.000 abstract description 2
- 239000012362 glacial acetic acid Substances 0.000 abstract description 2
- 239000011521 glass Substances 0.000 abstract description 2
- 229960002050 hydrofluoric acid Drugs 0.000 abstract description 2
- 229910017604 nitric acid Inorganic materials 0.000 abstract description 2
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 239000002019 doping agent Substances 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 229910020968 MoSi2 Inorganic materials 0.000 abstract 1
- 230000002950 deficient Effects 0.000 abstract 1
- 238000006073 displacement reaction Methods 0.000 abstract 1
- 238000003475 lamination Methods 0.000 abstract 1
- 239000011259 mixed solution Substances 0.000 abstract 1
- 238000004227 thermal cracking Methods 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
- 229910052710 silicon Inorganic materials 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- 238000010586 diagram Methods 0.000 description 7
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 6
- 229910052750 molybdenum Inorganic materials 0.000 description 6
- 239000011733 molybdenum Substances 0.000 description 6
- YXTPWUNVHCYOSP-UHFFFAOYSA-N bis($l^{2}-silanylidene)molybdenum Chemical compound [Si]=[Mo]=[Si] YXTPWUNVHCYOSP-UHFFFAOYSA-N 0.000 description 5
- 229910021344 molybdenum silicide Inorganic materials 0.000 description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 238000007738 vacuum evaporation Methods 0.000 description 2
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 1
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 1
- 238000001069 Raman spectroscopy Methods 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical group [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000003340 mental effect Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 238000000790 scattering method Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000005979 thermal decomposition reaction Methods 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は単結晶シリコン半導体装置用基板、特に絶縁体
膜上に形成された単結晶シリコン半導体装置用基板およ
びその製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a substrate for a single crystal silicon semiconductor device, particularly a substrate for a single crystal silicon semiconductor device formed on an insulating film, and a method for manufacturing the same.
ＬＳＩ技術の進歩に伴い、絶縁体膜上に形成された単結
晶シリコン膜はデバイスの低消費電力化。As LSI technology advances, single-crystal silicon films formed on insulator films reduce device power consumption.
高速化、更には三次元化に有用な半導体装置用基板とし
て注目されている。いわゆる、８０Ｉ（８ｉｏｎ Ｉｎ
５ｕｌａｔｏｒ ）技術においては、レーザビーム。It is attracting attention as a substrate for semiconductor devices useful for speeding up and even three-dimensionalization. The so-called 80I (8ion In
5ulator) technology, a laser beam.
電子ビーム、加熱ランプにより、あらかじめ絶縁体基板
表面上に堆積させておいた非晶質もしくは多結晶シリコ
ン膜をアニールし、再結晶化させて得たシリコン膜を半
導体装置用基板として用いようとするものであるが、い
づれの方法においても、該再結晶化シリコン膜を大面積
に形成したり、完全な結晶学的方位を制御することは困
難であった。An attempt is made to anneal and recrystallize an amorphous or polycrystalline silicon film previously deposited on the surface of an insulating substrate using an electron beam or a heating lamp, and use the resulting silicon film as a substrate for semiconductor devices. However, in either method, it is difficult to form the recrystallized silicon film over a large area or to completely control the crystallographic orientation.
本発明は従来のもののこのような欠点を除去し。The present invention eliminates these drawbacks of the prior art.
大面積に渡って均一な膜厚をもち結晶学的方位を制御し
た単結晶シリコン半導体装置用基板を提供するものであ
る。The present invention provides a substrate for a single-crystal silicon semiconductor device that has a uniform film thickness over a large area and has controlled crystallographic orientation.
本発明単結晶シリコン半導体装置用基板は保持用基板本
体上に順次第１の非晶質絶縁体膜、金属シリサイド層、
第２の非晶質絶縁体膜、単結晶シリコン膜が形成されて
構成される。The single-crystal silicon semiconductor device substrate of the present invention has an amorphous insulator film, a metal silicide layer,
A second amorphous insulator film and a single crystal silicon film are formed.
また、本発明単結晶シリコン半導体装置用基板の製造方
法は、第１の単結晶シリコン保持用基板なくとも表面に
絶縁体層が形成された第２の保持用基板を用意し、第１
の基板の絶縁体膜と、第２の基板の絶縁体層との間に金
属シリサイド膜を形成することによって接着して、然る
後前記第１の保持用基板を除去することを特徴とする。Further, in the method for manufacturing a single crystal silicon semiconductor device substrate of the present invention, at least a second single crystal silicon holding substrate having an insulating layer formed on its surface is prepared;
The insulating film of the substrate and the insulating layer of the second substrate are bonded by forming a metal silicide film between them, and then the first holding substrate is removed. .
以下５本発明の実施例を図面を参照して詳細に説明する
。第１図は本発明の単結晶シリコン半導体装置用基板を
形成する工程を説明する模式図である。第１図（ａ）は
、直径７５＃Ｉｍ、板厚４５０μｍの単結晶シリコン基
板ｌ上に化学気相成長法で堆積させｔ膜厚１μｍの二酸
化シリコン膜２を用ｂ１電子線加加熱式の真空蒸着装置
で該二酸化シリコン膜２上に、順次、蒸着シリコン膜３
を０．４μｍ堆積し、次いで、同一蒸着装置内で蒸着金
属モリブデン膜４を０．３μｍ堆積させた基板断面の模
式前記シリコン基板ｌは本発明における単結晶シリコン
膜を保持する保持用基板本体として用いた。Hereinafter, five embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic diagram illustrating the process of forming a substrate for a single-crystal silicon semiconductor device of the present invention. Figure 1(a) shows a silicon dioxide film 2 with a thickness of 1 μm deposited by chemical vapor deposition on a single-crystal silicon substrate 1 with a diameter of 75 mm and a thickness of 450 μm. A vapor-deposited silicon film 3 is sequentially deposited on the silicon dioxide film 2 using a vacuum evaporation device.
A schematic diagram of a cross section of a substrate on which a metal molybdenum film 4 of 0.3 μm was deposited in the same vapor deposition apparatus. Using.
前記蒸着シリコン膜３及び蒸着金属モリブデン膜４は多
重連式のターゲットを有する真空蒸着装置によハ真空系
を切ることなく、連続して蒸着を行った。なお蒸着中の
真空度は１０ＴＯｒｒであった。The vapor-deposited silicon film 3 and the vapor-deposited metal molybdenum film 4 were continuously vapor-deposited using a vacuum vapor deposition apparatus having multiple targets without turning off the vacuum system. Note that the degree of vacuum during vapor deposition was 10 TOrr.
第１図（ｂ）は第１図（ａ）で示した単結晶シリコン膜
保持用基板に保持させる単結晶シリコン膜を含む基板断
面の模式図である。５は高濃度（１０１９／Ｃｌ１）の
ボロンを有する直径７６ｙｒｉ、板厚４５０μｍの面方
位が（１００）の単結晶シリコン基板である。FIG. 1(b) is a schematic diagram of a cross section of a substrate including a single crystal silicon film held by the single crystal silicon film holding substrate shown in FIG. 1(a). Reference numeral 5 denotes a single crystal silicon substrate with a (100) plane orientation, having a diameter of 76 yri and a plate thickness of 450 μm, which contains boron at a high concentration (1019/Cl1).
６は該単結晶シリコン基板５上にホモエピタキシャル成
長させた低不純物濃度の単結晶シリコン膜であるっ該単
結晶シリコン膜６は成長温度を１０５０℃とし、シラン
ガス（５ｉＨａ ） の熱分解法により成長させたもの
で膜厚は１μｍとした。７は前記単結晶シリコン膜６上
に化学気相成長法で堆積させた二酸化シリコン膜で、膜
厚は１μｍとした。6 is a low impurity concentration single crystal silicon film homoepitaxially grown on the single crystal silicon substrate 5. The single crystal silicon film 6 was grown by thermal decomposition of silane gas (5iHa) at a growth temperature of 1050°C. The film thickness was 1 μm. Reference numeral 7 denotes a silicon dioxide film deposited on the single crystal silicon film 6 by chemical vapor deposition, and the film thickness was 1 μm.
８は真空蒸着装置を用いて、該二酸化シリコン膜７上に
堆積させた蒸着シリコン膜で、膜厚は０．４μｍである
。Reference numeral 8 denotes a vapor-deposited silicon film deposited on the silicon dioxide film 7 using a vacuum evaporation apparatus, and the film thickness is 0.4 μm.
次に、これら二つの基板をモリブデン膜４の表面と蒸着
シリコン膜８の表面が互いに向い合うように接着させた
。互いに接着させた基板を温度７００℃、雰囲気が窒素
ガス中の炉内で、加圧接着させながら、３０分間の熱処
理を施し、モリブデン膜４をはさんで蒸着シリコン膜３
．８との間で金属シリサイド形成化学反応を進行させ、
モリブデンシリサイド膜を形成させた。Next, these two substrates were bonded together such that the surface of the molybdenum film 4 and the surface of the vapor-deposited silicon film 8 faced each other. The bonded substrates were heat-treated for 30 minutes while being bonded under pressure in a furnace at a temperature of 700° C. and in a nitrogen gas atmosphere, and the molybdenum film 4 was sandwiched between the vapor-deposited silicon films 3.
．． Proceeding a metal silicide forming chemical reaction with 8,
A molybdenum silicide film was formed.
第２図は、以上のごとく、モリブデンシリサイド膜９を
形成し接着させた保持用基板と単結晶シリコン膜を含む
基板において、第１図（ｂ）で示した（１００）単結晶
シリコン基板５を取り除いた基板断面の模式図である。FIG. 2 shows the (100) single-crystal silicon substrate 5 shown in FIG. FIG. 3 is a schematic diagram of a cross section of a removed substrate.
次に、単結晶シリコン基板５を取り除く工程について説
明する。先ず、研摩加工により、保持用基板である単結
晶シリコン基板５の板厚を４５０μｍから２０μｍ程度
に減少さ一＋！：たつ次いで、ダラシユニ・ソテ／ダ液
（組成はふつ酸ｌ、硝酸３゜氷酢酸９の割合）により、
ボロンを高濃度に含む単結晶シリコン基板５を工・ソテ
ングして、その板厚を減少させた。ダッシュエツチング
液はボロンを高濃度に含むシリコンと低不純物濃度のシ
リコンに対して、低不純物濃度のシリコンのエツチング
速度ｅｌとすると、そのエツチング速度の選択比は５０
にも達し、エツチングの最終工程において、ボロンを高
濃度に含むシリコンのみがエツチングされ、低不純物濃
度の単結晶シリコン膜６が得られる。Next, a process for removing single crystal silicon substrate 5 will be described. First, by polishing, the thickness of the single-crystal silicon substrate 5, which is a holding substrate, was reduced from 450 μm to approximately 20 μm. : Then, with Darashi Uni Sote/Da liquid (composition is 1 part fluoric acid, 3 parts nitric acid, 9 parts glacial acetic acid),
A single crystal silicon substrate 5 containing a high concentration of boron was processed and sautéed to reduce its thickness. The dash etching solution has an etching rate el of silicon with a low impurity concentration compared to silicon with a high concentration of boron and silicon with a low impurity concentration, and the etching rate selectivity is 50.
In the final step of etching, only the silicon containing a high concentration of boron is etched, and a single crystal silicon film 6 with a low impurity concentration is obtained.
以上のごとく、第２図に示したように、保持用基板本体
であるシリコン基板１上に非晶質絶縁体膜である二酸化
シリコン膜２が形成され、該二酸化シリコン膜２上に金
属シリサイド形成化学反りにより形成されたモリブデン
シリサイド膜９を備え、更に該モリブデンシリサイド膜
９上に二酸化シリコン膜７を備え、該二酸化シリコン膜
７上に面方位が（１００）である単結晶シリコン膜６が
形成された単結晶シリコン半導体装置用基板を得た。As described above, as shown in FIG. 2, a silicon dioxide film 2 which is an amorphous insulating film is formed on the silicon substrate 1 which is the main body of the holding substrate, and metal silicide is formed on the silicon dioxide film 2. A molybdenum silicide film 9 formed by chemical warping is provided, a silicon dioxide film 7 is provided on the molybdenum silicide film 9, and a single crystal silicon film 6 having a plane orientation of (100) is formed on the silicon dioxide film 7. A substrate for a single crystal silicon semiconductor device was obtained.
本発明により得られた単結晶シリコン膜の結晶性をＸ線
回折、電子線回折、ラマン散乱法により評価したところ
、転位、積層欠陥、結晶欠陥が含ま九でおらず、また残
留歪がないことが明らかとな９、また膜厚むらが１μｍ
±０．０３μｍ で直径７６１ｍの大面積に渡って、高
品質であることがわかった。When the crystallinity of the single crystal silicon film obtained by the present invention was evaluated by X-ray diffraction, electron beam diffraction, and Raman scattering methods, it was found that there were no dislocations, stacking faults, or crystal defects, and there was no residual strain. 9, and the film thickness unevenness is 1 μm.
It was found to be of high quality with ±0.03 μm over a large area of 761 m in diameter.
本発明で保持基板と非晶質絶縁体膜をはさんで単結晶シ
リコン膜を接着しているモリブデンシリサイド膜はその
溶融温度は１８７０℃で、シリコンの溶融温度１４２０
℃よりも高く、その耐熱性は非常に優れており５通常の
デバイスプロセスにも十分に耐えうるう本実施例では金
属シリサイドとしてモリブデンシリサイドを用いた例を
示したが、一般に他の金属シリサイドも耐熱性に優れ、
他のタングステンシリサイド、メンタルシリ丈イド。In the present invention, the melting temperature of the molybdenum silicide film used to bond the single crystal silicon film between the holding substrate and the amorphous insulator film is 1870°C, which is 1420°C, which is the melting temperature of silicon.
℃, its heat resistance is very excellent, and it can withstand normal device processes.Although molybdenum silicide was used as the metal silicide in this example, other metal silicides are generally also heat resistant. Excellent in sex,
Other tungsten silicides, mental silicides.
チタンシリサイドを用いても本発明は有効である。The present invention is also effective even when titanium silicide is used.
また、本実施例では保持用基板本体として単結晶シリコ
ン基板を用いたが、他のガラス基板、絶縁体基板を用い
ても良く、非晶質絶縁体膜として化学気相成長法で成長
させた二酸化シリコン膜以外にも、他の熱酸化膜、絶縁
体膜を用いても本発明は同様に達せられる。Further, in this example, a single crystal silicon substrate was used as the holding substrate body, but other glass substrates or insulating substrates may be used, and an amorphous insulating film may be grown by chemical vapor deposition. In addition to the silicon dioxide film, the present invention can be similarly achieved using other thermal oxide films or insulating films.
本発明は、大面積に渡って均一な膜厚をもつ単結晶シリ
コン半導体装置用基板が得られ、８０Ｉを用すた高集積
度回路デバイス形成に与える経済的効果は犬なるもので
ある。According to the present invention, a single crystal silicon semiconductor device substrate having a uniform film thickness over a large area can be obtained, and the economical effects on the formation of highly integrated circuit devices using 80I are significant.
第１図（ａ）（ｂ）は本発明の単結晶シリコン半導体装
置用基板製造方法を説明するために用いた基板断面の一
例の模式図っ第２図は本発明の基板の一実施例の模式図
である。
１．５・・・・・・単結晶シリコン基板、２．７・・・
・・・二酸化シリコ／膜、３，８・・・・・・蒸着シリ
コン膜、４・・・・・・蒸着モリブデン膜、９・・・・
・・モリブデン７リサイド膜、６・−・・・・単結晶シ
リコン膜。
皿 、′
代理人 弁理士 内 原 ヨ（
栢 １
（ａ）
（ｂ）FIGS. 1(a) and 1(b) are schematic diagrams of an example of a cross section of a substrate used to explain the method of manufacturing a substrate for a single-crystal silicon semiconductor device of the present invention. FIG. 2 is a schematic diagram of an example of a substrate of the present invention. It is a diagram. 1.5... Single crystal silicon substrate, 2.7...
...Silicon dioxide/film, 3,8...Vapour-deposited silicon film, 4...Vapor-deposited molybdenum film, 9...
... Molybdenum 7 silicide film, 6... Single crystal silicon film. Sara,' Agent Patent Attorney Yo Uchihara (Haka 1 (a) (b)
Claims (2)
、金属シリサイド層、第２の非晶質絶縁体膜。 単結晶シリコン膜が形成されていることを特徴とする単
結晶シリコン半導体装置用基板。(1) A first amorphous insulator film, a metal silicide layer, and a second amorphous insulator film are sequentially formed on the holding substrate main body. A substrate for a single-crystal silicon semiconductor device, characterized in that a single-crystal silicon film is formed.
面に絶縁体層が形成された第２の保持側基板金用意し第
１の基板の絶縁体膜と第２の基板の絶縁体層との間に金
属シリサイド膜を形成することによって接着して、然る
後前記第１の保持用基板を除去することを特徴とする単
結晶シリコン半導体装置用基板の製造方法。(2) Prepare a second holding side substrate in which an insulating layer is formed on the surface of the single crystal on the first single crystal silicon holding substrate, and insulate the insulating film of the first substrate and the second substrate. A method of manufacturing a substrate for a single crystal silicon semiconductor device, characterized in that the first holding substrate is bonded to a body layer by forming a metal silicide film therebetween, and then the first holding substrate is removed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11134783A JPS603148A (en) | 1983-06-21 | 1983-06-21 | Substrate for single crystal silicon semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11134783A JPS603148A (en) | 1983-06-21 | 1983-06-21 | Substrate for single crystal silicon semiconductor device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS603148A true JPS603148A (en) | 1985-01-09 |
Family
ID=14558882
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11134783A Pending JPS603148A (en) | 1983-06-21 | 1983-06-21 | Substrate for single crystal silicon semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS603148A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62216352A (en) * | 1986-03-18 | 1987-09-22 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPS6310376U (en) * | 1986-07-08 | 1988-01-23 | ||
| EP0371861A2 (en) * | 1988-11-29 | 1990-06-06 | Mcnc | High density semiconductor structure and method of making the same |
| US5168078A (en) * | 1988-11-29 | 1992-12-01 | Mcnc | Method of making high density semiconductor structure |
| FR2682811A1 (en) * | 1991-09-10 | 1993-04-23 | Mitsubishi Electric Corp | STACKED SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD. |
| US7927975B2 (en) | 2009-02-04 | 2011-04-19 | Micron Technology, Inc. | Semiconductor material manufacture |
-
1983
- 1983-06-21 JP JP11134783A patent/JPS603148A/en active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62216352A (en) * | 1986-03-18 | 1987-09-22 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPS6310376U (en) * | 1986-07-08 | 1988-01-23 | ||
| JPH0541330Y2 (en) * | 1986-07-08 | 1993-10-19 | ||
| EP0371861A2 (en) * | 1988-11-29 | 1990-06-06 | Mcnc | High density semiconductor structure and method of making the same |
| EP0371861A3 (en) * | 1988-11-29 | 1991-04-10 | Mcnc | High density semiconductor structure and method of making the same |
| US5168078A (en) * | 1988-11-29 | 1992-12-01 | Mcnc | Method of making high density semiconductor structure |
| FR2682811A1 (en) * | 1991-09-10 | 1993-04-23 | Mitsubishi Electric Corp | STACKED SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD. |
| US5355022A (en) * | 1991-09-10 | 1994-10-11 | Mitsubishi Denki Kabushiki Kaisha | Stacked-type semiconductor device |
| US5504376A (en) * | 1991-09-10 | 1996-04-02 | Mitsubishi Denki Kabushiki Kaisha | Stacked-type semiconductor device |
| US7927975B2 (en) | 2009-02-04 | 2011-04-19 | Micron Technology, Inc. | Semiconductor material manufacture |
| US8389385B2 (en) | 2009-02-04 | 2013-03-05 | Micron Technology, Inc. | Semiconductor material manufacture |
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