JPS60258793A - ダイナミック型半導体記憶装置 - Google Patents
ダイナミック型半導体記憶装置Info
- Publication number
- JPS60258793A JPS60258793A JP59116310A JP11631084A JPS60258793A JP S60258793 A JPS60258793 A JP S60258793A JP 59116310 A JP59116310 A JP 59116310A JP 11631084 A JP11631084 A JP 11631084A JP S60258793 A JPS60258793 A JP S60258793A
- Authority
- JP
- Japan
- Prior art keywords
- bit line
- dummy
- bit lines
- memory cell
- storage capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59116310A JPS60258793A (ja) | 1984-06-04 | 1984-06-04 | ダイナミック型半導体記憶装置 |
US06/738,870 US4715015A (en) | 1984-06-01 | 1985-05-29 | Dynamic semiconductor memory with improved sense signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59116310A JPS60258793A (ja) | 1984-06-04 | 1984-06-04 | ダイナミック型半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60258793A true JPS60258793A (ja) | 1985-12-20 |
JPH0414435B2 JPH0414435B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-03-12 |
Family
ID=14683832
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59116310A Granted JPS60258793A (ja) | 1984-06-01 | 1984-06-04 | ダイナミック型半導体記憶装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60258793A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63201991A (ja) * | 1987-02-17 | 1988-08-22 | Matsushita Electronics Corp | 半導体ダイナミツクランダムアクセスメモリ− |
JPH01144292A (ja) * | 1987-11-30 | 1989-06-06 | Nec Corp | 半導体メモリ |
US5153685A (en) * | 1987-09-19 | 1992-10-06 | Hitachi, Ltd. | Semiconductor integrated circuit device having switching MISFET and capacitor element and method of producing the same, including wiring therefor and method of producing such wiring |
JPH06223572A (ja) * | 1992-10-30 | 1994-08-12 | Internatl Business Mach Corp <Ibm> | Dram構造 |
US5917211A (en) * | 1988-09-19 | 1999-06-29 | Hitachi, Ltd. | Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS581889A (ja) * | 1981-06-29 | 1983-01-07 | Fujitsu Ltd | 半導体記憶装置のダミ−セル制御方式 |
JPS58171789A (ja) * | 1982-03-19 | 1983-10-08 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | メモリアレイ |
-
1984
- 1984-06-04 JP JP59116310A patent/JPS60258793A/ja active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS581889A (ja) * | 1981-06-29 | 1983-01-07 | Fujitsu Ltd | 半導体記憶装置のダミ−セル制御方式 |
JPS58171789A (ja) * | 1982-03-19 | 1983-10-08 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | メモリアレイ |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63201991A (ja) * | 1987-02-17 | 1988-08-22 | Matsushita Electronics Corp | 半導体ダイナミツクランダムアクセスメモリ− |
US5153685A (en) * | 1987-09-19 | 1992-10-06 | Hitachi, Ltd. | Semiconductor integrated circuit device having switching MISFET and capacitor element and method of producing the same, including wiring therefor and method of producing such wiring |
US6281071B1 (en) | 1987-09-19 | 2001-08-28 | Hiatchi, Ltd. | Method of producing semiconductor integrated circuit device having switching MISFET and capacitor element including wiring therefor and method of producing such wiring |
US6737318B2 (en) | 1987-09-19 | 2004-05-18 | Hitachi, Ltd. | Semiconductor integrated circuit device having switching misfet and capacitor element and method of producing the same, including wiring therefor and method of producing such wiring |
JPH01144292A (ja) * | 1987-11-30 | 1989-06-06 | Nec Corp | 半導体メモリ |
US5917211A (en) * | 1988-09-19 | 1999-06-29 | Hitachi, Ltd. | Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same |
JPH06223572A (ja) * | 1992-10-30 | 1994-08-12 | Internatl Business Mach Corp <Ibm> | Dram構造 |
Also Published As
Publication number | Publication date |
---|---|
JPH0414435B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-03-12 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |