JPS60254788A - Method of producing printed circuit board - Google Patents

Method of producing printed circuit board

Info

Publication number
JPS60254788A
JPS60254788A JP11197184A JP11197184A JPS60254788A JP S60254788 A JPS60254788 A JP S60254788A JP 11197184 A JP11197184 A JP 11197184A JP 11197184 A JP11197184 A JP 11197184A JP S60254788 A JPS60254788 A JP S60254788A
Authority
JP
Japan
Prior art keywords
plating
printed wiring
manufacturing
electroless
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11197184A
Other languages
Japanese (ja)
Inventor
魚津 信夫
洋一 松田
邦明 関口
石山 義夫
横山 博義
清沢 賢
西条 利夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lincstech Circuit Co Ltd
Original Assignee
Hitachi Condenser Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Condenser Co Ltd filed Critical Hitachi Condenser Co Ltd
Priority to JP11197184A priority Critical patent/JPS60254788A/en
Publication of JPS60254788A publication Critical patent/JPS60254788A/en
Pending legal-status Critical Current

Links

Landscapes

  • Chemically Coating (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は無電解めっきによるプリント配線板の製造方法
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Field of Application) The present invention relates to a method of manufacturing a printed wiring board by electroless plating.

(従来の技術) 各種電気機器に組み込まれているプリント配線板は、機
器の小型化に従ってより高密度化され、回路、1】や回
路の間隔のより狭いものが要求されている。
(Prior Art) Printed wiring boards incorporated in various electrical devices are becoming more dense as the devices become smaller, and circuits (1) and circuit spacing are required to be narrower.

CC−4法等の無電解めっき法によりプリント配線板を
製造する場合、基板にめっき触媒入りの接着剤を塗布し
、めっきレジストを印刷し、その後無電解めっきにより
銅等の金属を接着剤表面に析出し回路を形成しているが
、この際にめっきレジストの表面に銅等が析出し付着し
て回路間が短絡する欠点があり、高密度化により特に著
しく増加している。
When manufacturing printed wiring boards using an electroless plating method such as the CC-4 method, an adhesive containing a plating catalyst is applied to the substrate, a plating resist is printed, and then a metal such as copper is applied to the adhesive surface by electroless plating. However, at this time, copper or the like deposits and adheres to the surface of the plating resist, resulting in short circuits between the circuits, which is a drawback that is increasing particularly with increasing density.

また、無電解めっき液は、使用によりめっき油汚染物質
が増加し、この汚染物質により結晶間にクラックやボイ
ドが発生し、曲げによる回路破断が生じ易くなる欠点が
あり、高密度化により回路1jが狭くなると、より容易
に回路が切断し易くなる欠点があった。
In addition, electroless plating solutions have the disadvantage that plating oil contaminants increase with use, and these contaminants cause cracks and voids to occur between crystals, making circuits more likely to break due to bending. As the width becomes narrower, there is a drawback that the circuit becomes more easily disconnected.

(目的) 本発明は、上記の欠点を改良し、断線不良や短絡不良を
防止しうるプリント配線板の製造方法の提供を目的とす
る。
(Objective) It is an object of the present invention to provide a method for manufacturing a printed wiring board that can improve the above-mentioned drawbacks and prevent disconnections and short circuits.

(問題点を解決するための手段) 本発明は上記の目的を達成するために、基板に無電解め
っきにより回路を形成するプリント配線板の製造方法に
おいて、第1の無電解めっき液により基板にめつぎを析
出する工程と、該工程後に第2の無電解めっき液により
前記めっきよりもブレーンサイズの小さいめっきを析出
する工程とを施すことを特徴とするプリント配線板の製
造方法を提供するものである。
(Means for Solving the Problems) In order to achieve the above object, the present invention provides a method for manufacturing a printed wiring board in which a circuit is formed on a substrate by electroless plating. Provided is a method for manufacturing a printed wiring board, comprising the steps of depositing plating and, after the step, depositing plating with a smaller brain size than the plating using a second electroless plating solution. It is.

(作用) ずなわち、本発明によれば、先ず基板に近い方にブレー
ンサイズのより大きいめっきを析出させ、その後ブレー
ンサイズのより小さいめっきを析出しているため最初の
めつき処理によりめっきレジスト表面にめっきが付着し
たとしても次のめつき処理によりこのめっきがほとんど
成長することなく、回路間の短絡を防止しうる。また、
ブレーンサイズのより大ぎいめつきの結晶間にブレーン
サイズのより小さいめっきが入り込み、回路の機械的強
度が向上し、断線不良を防止しうる。
(Function) According to the present invention, plating with a larger brain size is first deposited on the side closer to the substrate, and then plating with a smaller brain size is deposited. Even if plating adheres to the surface, this plating will hardly grow during the next plating process, and short circuits between circuits can be prevented. Also,
Plating with a smaller brain size is inserted between the crystals with a larger brain size, improving the mechanical strength of the circuit and preventing disconnection defects.

なお、第2の無電解めっき液により析出しためつきのブ
レーンサイズは10μm以下である方が、回路の断線防
止に対してより効果的である。
Note that it is more effective to prevent circuit disconnection if the brain size of the deposits deposited by the second electroless plating solution is 10 μm or less.

(実施例) 以下、本発明を実施例に基づいて説明する。(Example) Hereinafter, the present invention will be explained based on examples.

先ず、基板としてパラジウム等のめつき触媒入りの紙フ
エノール樹脂基材や紙エポキシ樹脂基材等の絶縁基板を
用い、表面にめっき触媒入りの接着剤を塗布する。絶縁
基板に接着剤を塗布した後、所定のパターンにめっきレ
ジストを印刷する。めっきレジスト印刷後、絶縁基板を
粗化液中にWl潰し露出している接着剤表面を粗化する
。接着剤表面を粗化後、絶縁基板を第1の無電解銅めっ
き液中に浸漬して銅めっきを析出する。次に、絶縁基板
を、第1の無電解銅めっき液よりもめっき液汚染物質濃
度の低い第2の無電解銅めっき液中に浸漬し、ブレーン
サイズの小さい銅めっきを析出しC、プリント配線板を
製造する。
First, an insulating substrate such as a paper phenol resin base material or a paper epoxy resin base material containing a plating catalyst such as palladium is used as a substrate, and an adhesive containing a plating catalyst is applied to the surface. After applying adhesive to the insulating substrate, a plating resist is printed in a predetermined pattern. After printing the plating resist, the insulating substrate is immersed in a roughening solution to roughen the exposed adhesive surface. After roughening the adhesive surface, the insulating substrate is immersed in a first electroless copper plating solution to deposit copper plating. Next, the insulating substrate is immersed in a second electroless copper plating solution that has a lower concentration of plating solution contaminants than the first electroless copper plating solution, and copper plating with a small brain size is deposited. Manufacture boards.

次に、本発明と従来例について銅箔の破断するに至るま
での折り曲げ回数を測定したところ表の通りの結果が得
られた。各試料は、表面にパラジ表 iけ 回) ラムめっき触媒を付着したステンレス基板を無電解銅め
っき液中に浸漬して銅めっきを析出し、この銅めっきを
ステンレス基板から剥離したものを用いる。表から明ら
かな通り、本発明によれば従来例よりも折り曲げ回数が
4倍以上増加しており、銅めっき層の機械的強度が向上
している。
Next, the number of times the copper foil was bent until it broke was measured for the present invention and the conventional example, and the results shown in the table were obtained. Each sample was prepared by immersing a stainless steel substrate with a ram plating catalyst on its surface in an electroless copper plating solution to deposit copper plating, and peeling off the copper plating from the stainless steel substrate. As is clear from the table, according to the present invention, the number of times of bending is increased by more than four times compared to the conventional example, and the mechanical strength of the copper plating layer is improved.

(効果) 以上の通り、本発明によれば、めっきレジスト表面に析
出1′る金属による短絡不良や折り曲げ等による断線不
良を効果的に防止しつるプリント配線板の製造方法が得
られる。
(Effects) As described above, according to the present invention, there is provided a method for manufacturing a printed wiring board that effectively prevents short circuits caused by metal deposited on the surface of a plating resist and disconnections caused by bending or the like.

特許出願人 日立コンデンサ株式会社Patent applicant: Hitachi Capacitor Co., Ltd.

Claims (1)

【特許請求の範囲】 (1ン 基板にS電解めっきにより回路を形成するプリ
ント配線板の製造方法において、第1の無電解めっき液
により基板にめっきを析出する工程と、該工程後に第2
の無電解めっき液により前記めっきよりもブレーンサイ
ズの小さいめっきを析出する工程とを施すことを特徴と
するプリント配線板の製造方法。 (2)第2の無電解めっき液により析出しためっきのブ
レーンサイズが10μm以下である特許請求の範囲第1
項記載のプリント配線板の製造方法。
[Claims] (1) A method for manufacturing a printed wiring board in which a circuit is formed on a substrate by S electrolytic plating, which includes a step of depositing plating on the substrate with a first electroless plating solution, and a second step after the step.
A method for manufacturing a printed wiring board, comprising: depositing a plating having a smaller brain size than the plating using an electroless plating solution. (2) Claim 1, in which the brain size of the plating deposited by the second electroless plating solution is 10 μm or less
A method for manufacturing a printed wiring board as described in Section 1.
JP11197184A 1984-05-31 1984-05-31 Method of producing printed circuit board Pending JPS60254788A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11197184A JPS60254788A (en) 1984-05-31 1984-05-31 Method of producing printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11197184A JPS60254788A (en) 1984-05-31 1984-05-31 Method of producing printed circuit board

Publications (1)

Publication Number Publication Date
JPS60254788A true JPS60254788A (en) 1985-12-16

Family

ID=14574720

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11197184A Pending JPS60254788A (en) 1984-05-31 1984-05-31 Method of producing printed circuit board

Country Status (1)

Country Link
JP (1) JPS60254788A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5516476A (en) * 1978-07-21 1980-02-05 Fujitsu Ltd Method of mounting semiconductor device
JPS55117299A (en) * 1979-03-05 1980-09-09 Hitachi Ltd Method of fabricating printed circuit board by noovoltage copper plating
JPS5967692A (en) * 1982-10-12 1984-04-17 株式会社東芝 Method of producing printed circuit board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5516476A (en) * 1978-07-21 1980-02-05 Fujitsu Ltd Method of mounting semiconductor device
JPS55117299A (en) * 1979-03-05 1980-09-09 Hitachi Ltd Method of fabricating printed circuit board by noovoltage copper plating
JPS5967692A (en) * 1982-10-12 1984-04-17 株式会社東芝 Method of producing printed circuit board

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