CA1198524A - Process of manufacturing printed wiring boards and printed wiring boards manufactured by the same - Google Patents

Abstract

TITLE OF THE INVENTION

PROCESS OF MANUFACTURING PRINTED WIRING BOARDS AND
PRINTED WIRING BOARDS MANUFACTURED BY THE SAME

ABSTRACT

A printed wiring board of this invention can be obtained by the steps of: making holes in the necessary portion of a copper-clad laminate; forming a catalytic layer on said hole walls and copper foil by pretreatment for electroless plating;
forming an etching resist film on necessary lands and circuits;
melting-off the copper foil and catalytic layer on the unneces-sary portion of said copper-clad laminate by etching; melting off or retaining said etching resist film; and forming an electroless copper plated film on said catalytic layer; or forming a solder resist film on the necessary portion before or after said electroless copper plated film is formed.

Description

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BACKGROUND OF T~E INVENTION
1. Field of the invention This invention relates to the process of manufacturing printed wiring boards suitably used for business, communication and electric machine and tools and printed wiring boards manu-factured by the same.

2. Description of the Prior Art The ~onventional processes of manufacturing printed wiring boards called copper through-hole printed wiring boards have been roughly classified into two methods such as the subtractive process wherein the printed wiring board is made from the copper-clad lamina~ and the additive process wherein the printed wiring board is made from the copper foil laminate~free catalyst included laminate. As examples o~ the former there are enumerated (1) the so-called tenting process which comprises the steps of making ~oles; pla~ing through holes; thereafter copper plating said hole walls and copper ~oil to the thickness required for the hole wall by electrolysis pouring ink in the hole wai3s for forming an etching resist film on necessary circuits; thereafter removing the copper foil on the unnecessary portion by etching; and then stripping off the etching resist film and (2) the modified process which comprises the steps of making necessary circuits by etching;
thereafter making holes; forming a pretreating layer on said hole walls and circuits by electroless plating; mechanically removing said pretreating layer on circuits; forming a solder resist film on the necessary portion; and thereafter forming an electroless plated film on the hole walls and necessary circuits; or making holes after the solder resist film is formed. And, ~ 2 --a~ the example of the latter add;tive process there is cited (3) the p~ocess which comprises the steps of applyin~ a bonding s~ent onto a catalyst included laminate; there~fter makin~ holes; forming a per~anent resist film on the portion other than circuits; then forming copper on the hole wslls and eircuits by electroless platin~; and thereafter formin~ a soldsr resist film on the necessary portion. How~ver, these conventional process ioclude various shortcomings in the respects of quality and productivity. This will be explained concernin~ eaeh e~ample of the above mentioned process. The process example ~1) is defective in that it ta~es a long period o~ time to remove the copper on the unnecessary portions by etchin~ because the thickness of said copper, which comprises the thickness of copper foil and th~t of through-hole plating is nearly twice that of copper foil, and therefore circuits become considerably undercut with the resul~ of d~teriorated dimensionQl accurscy.
The procsss exa~ple (2) is defective in that circuits are first formed by etching, and therea~ter a layer is formed on the hole wall portions and solder resist film or on the nsked laminatP by pretreatment for electroless plating, subsequently, the pretreatment layer for electroless plating is mechanieAlly removed from th0 circuits and thereafter electroless plating is conducted. It is dif~icult to completely remove the lsyer formed by pretreatment for electroless plating and therefore the plated layer remainin~ on the unnecessary portions brings about short circuits or deteriorates the insulation resistance bet~een circuitx. And, the process example (3) is defective in that it is necessary to use th0 special and expensive base material, namely the catalyst included laminate, which is not only expensive but also unsuitsble for commsn use, and further QS

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plating is made on permanent resist-ormed circuits, the dimen-sional accuracy of circuits is inferior, that is this process is unsuitable for circuits being less than 0.5 mm in width and the formed circuits are liable to lack uniformity in width.
SIJMMARY OF THE INVENTION
It is an object of this invention to obtain a highly accurate and cheap printed wiring board which is capable of removing the above mentioned short-comings inherent in conven-tional processes and completely freed from dangers of bad insulation resistance between circuits and short-circuit accidents without using any special base material at all. This object can be achieved by making holes in the necessary portion of a copper-clad laminate; forming a catalytic layer on said hole walls and copper fo~l by pretreatment for electroless plating;
forming an etching resist film on necessary lands and circuits;
removing the copper foil on the unnecessary portion by etchingi then stripping off the etching resist film; and forming an electroless copper plated film on the catalytic layer for.ned on the hole walls, lands and circuits, or forming an electroless copper plated film on the catalytic film formed on the hole walls without removing the etching resist film.
It is another object of this invention to obtain a printed wiring board which is capable of ensuring reliability for a long period of time by preventing circuits from bridging at the time of plating parts and/or protecting the surfaces of circuits and insulating material from moisture and the like.
This object can be achieved by forming a solder resist 35~

film on the necessary portion before or after said electroless copper plated film is formed in the above mentioned process.
The other objects of this invention will be clearl.y understood from the subsequent explanation.

- 4a -~RIEF DESCRIPTION OF THE ACCO~PANYING ~RA~INGS
Fig. 1 to Fig. 8 are cross-sectional views illustrating the process of manufacturing a throu~h-hole printed wiring board embodying this invention.
DETAILED DESCRIPTION OF THE P~ R~ EM~ODIMENTS
One example of the process of manufacturing a printed wiring board embodyin~ to this invention will be explained hereinafter with reference to the accompanying drawings.
First, holes 3 are ~ade in the necess~ry portion of a conventional copper-clad laminate which comprises laminating a copper foil 2 on an insulating material 1 as shown ;n Fig. 1 (Fig. 2~o These holes may be perforated by using a drill or punch. Then, a conventionsl pretreatment for electroless platin~ is performed. For 2~mple, thîs la~inate is dipped in an nlkali defatted liquid so as to clean the surfaces of copper foil and hole walls, thereafter is dipped in a S vol % hydrochloric acid agueous solution to activate the copper foil surface, and then is dipped in an aqueous solution, the so-called cataly~er, cont~ining 15 g/Q ionic conc~ntration of dihydric tin comprisin~ stannous chloride, palladium chloride and hydrochloric acid, 0.2S
~/Q ionic concentration of dihydric palladium and 200 mQ~Q of concentrated hydrochloric acid so as to form 8 tin-palladium colloid type catalytic layer 4 (Fi~. 3). Then, the surface on which the catalytic layer 4 has been formed by adsorption is subjected to forced or natural drying so as to have 1 sufficient adhesi~e property for an etching resist fil~, and thereafte~ sn etching resist film 5 is formed on the necessary portion (Fi~. 4). In this instance, said etchine resist may be either ink or a dry film, and its formation may be made by means of either a printing process or a photo~raphic process.

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Therea~ter, the copper foil on the unneces~ary portion is dissolved-off with a solution comprising 400 g/Q of fsrric chlorlde and 3 gtQ of hydrochloric acid or the like (Fi~. 5). In this ;nstance, the catalytic layer adsorbed on the copper foil is completely removed simultaneously with removal of the copper foil by etching. Consequently, the cat~lytir layer formed by pretreatment for electroless plating does no lon~er exist on the surface of the in~ulating material 1 from which the copper foil has b~em re~oved, but the catalytic layer formed on the inside wall of the throu~h hole is not re~oved nnd retained because it is adsorbed directly on the insulating plate. This i5 a marked ~h~racteristic of this disclosure. Dua to this, electroless plating may not deposit on anywhere other than the necessary portion during the subsequent circuit forming process and further deterioration in insulatioa res~stance between the circ~;ts no longer occurs. A known solution of ammonium persulfate or an alkali etchant may be used Por et~hing purposes.
Ne~t, the etchin~ reæist film 5 having now become useless is dissolYed-off in the usual manner by using trichlene or methylene dichloride (Fig. 6). Then, a solder resist fil~ is formed on the necessary portion for prs~entinp the circuits from brid~ing or protecting the surfaces of circui~s and insulatin~
ma~erial from steam and the like ~t the time of soldering (Fi~. 6'~. This solder resist film has recently become indispensable for industrial printed wiring boards in order to secure the long reliability of printed wiring bonrds, and is re~arded as importnnt especinlly in the case o~ the so-called copper through-hole printed wiring board here described. The solder resist is genar~lly formed with an epo~y type ink, but may be for~ed with n liquid or dry photosensitive resin film.

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ext, ik is preferable to dip the laminate in a 10% sulfuric ~acid solution and activate the catalytic layer 4 adsorption-..formed on the surfaces of copper foil covering hole walls and necessary circuits by pretreatment for electroless plating so that the reactivity of electroless copper plating may be dis-,~ prC, er/~
played pcr ~c~ly in the succeeding step. Then, the laminateis dipped in an electroless copper plating bath so as to form an electroless copper plated film 7 on the wall surfaces of holes 3 in the catalytic layer 4 formed by electxoless plating reaction and the surface of copper foil 2 on necessary circuits (Fig. 7'). One example of the bath composition and the plating condition of this electroless copper plating, will be given as follows. The following composition and condition may be used effecti.vely for high-speed plating:
Sodium ethylene diamine tetracetate 40 g/Q
Copper sulfate (CuSO4 5H2O)10 g/Q
Paraformaldehyde 10 g/Q
Sod.ium cyanide 100 ppm ~ pH 12 Temperature 60C. And, the following composition and condition may be used effectively ; for low-speed plating:
Rochelle salt 40 g/Q
Copper sulfate 10 g/Q
Paraformaldehyde 15 g/Q
Sodium hydroxide 8 g/Q
Sodium cyanide 100 ppm Temperature 25C
The thus obtained electroless copper plated film 7, as stated previously, is formed with a strong adheslve strength i

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selectively only on ~he cstalytic layer formed on the wall surface portions of holes 3, lands and circuits and therefore is not formed on the other unnecessary portions at all. Fig. 7' shows the board prepared through the steps which hava been described up to her0, that is the finished printed wiring board embodying the invention. The solder resist film may be formed prior to the electroless plating as showm in Fig. 6' and finished as sho~n in Fi~. 7~, but the film may alternatively be formed after the electroless plating has bee~ applied as shown in Fig. 7 and thereafter finished as shown tn Fig. 7'. When the solder resist film 6 is not reyuired, electroless plating may be appli~d directly onto the board as shown in Fig. 6, and the same may be finished as shown in Fi~. 7.
In this instance, the etching resist film 5 may be subjected to electroless copper plating treatment without being dissolved-off. In this case~ the etching resist film 5 is retain~d on the circuits and lands, and consequently the electroless copper plat~d film is formed only on the catalytic layer 4 exposed on the hole wall portion (Fi~. 7"). This etching resist film is dissolved-off in the usual manner aft~r the electroless copper plated film has bsen formed (Fig. 8). Howev~r, this etching resist film 5 may be retained 8S shown in Fig. 7" without being dissolved-off. This permits the etching resist film 5 to remain on the circuits and lands, and the remaining film 5 per~orms the same operation as the solder resist fil~ 6, thereby protecting the circuits and l~nds from mOiStUrQ and the like.
When comparing the printed wiring board obtained according to this disclosure with those obtained according to the conventional manufacturinK
processes in respect of the performance and cost, the results obtained therefrom can be summarized as shown in the following table.

\ Our Conventional processes process Example Example Example (1) (2) (3) 8ase material used cheapcheap cheap expensive Time required for shortshort short long Probable minimum circuit width 0.1 mm 0.3 mm O.2 ~m O.5 mm lation reSi5tance 1012-1013~ 1ol2 1ol3 7 Danger of short circuits nonenone exist exlst Soldering rate 100~ 80% 80~ 60~
Solder resist easyeasy difficult easy formlng accuracy This in~ention has be~n described in connection ~th a process Po~
~anufacturing through holes and circuits with an electrvless copper plated film, but the through holes ~nd circuits m~y be formed by usin~ electroless nickel plating without departing from the invention.

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Claims (10)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE PROPERTY OR PRIVILEGE
IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A process of manufacturing a printed wiring board comprising the steps of: making holes in the necessary portion of a copper-clad laminate; forming a catalytic layer on said hole walls and copper foil by pretreatment for electroless plating; forming an etching resist film on necessary lands and circuits; removing the copper foil on the unnecessary portion by etching;
removing the etching resist film; and forming an electroless plated film selected from copper and nickel on the catalytic layer formed on the hole walls, lands and circuits.

2. A process as claimed in Claim 1 wherein said electroless plated film is formed on the catalytic layer formed on the hole walls after etching has been effected and without removing the etching resist film.

3. A process as claimed in Claim 2 wherein the etching resist film is removed after the electroless plated film has been formed.

4. A process as claimed in any one of Claim 1 to Claim 3 wherein a solder resist film is formed on the necessary portion before or after the electroless plated film has been formed.

5. A process as defined in Claim 1, 2 or 3 wherein the electroless plated film is copper.

6. A process as claimed in Claim 1, 2 or 3 wherein the electroless plated film is nickel.

7. A process as defined in Claim 1, 2 or 3 wherein the catalytic layer is a tin-palladium colloid.

8. A printed wiring board comprising, a laminate, copper circuitry and lands on said laminate, through-holes in said laminate, a catalytic layer on walls of said holes, and a plated film selected from copper and nickel on said catalytic layer.

9. A printed wiring board as defined in claim 8, the catalytic layer also on the copper circuitry and lands, and the plated film also being on the catalytic layer on the circuitry and lands.

10. A printed wiring board as defined in Claims 8 or 9, the catalytic layer comprising a tin-palladium colloid.