JPS60248047A - Ring type information transmitter - Google Patents

Ring type information transmitter

Info

Publication number
JPS60248047A
JPS60248047A JP10372384A JP10372384A JPS60248047A JP S60248047 A JPS60248047 A JP S60248047A JP 10372384 A JP10372384 A JP 10372384A JP 10372384 A JP10372384 A JP 10372384A JP S60248047 A JPS60248047 A JP S60248047A
Authority
JP
Japan
Prior art keywords
speed
transmission
signal
low
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10372384A
Other languages
Japanese (ja)
Inventor
Takashi Yamashiro
山城 貴志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10372384A priority Critical patent/JPS60248047A/en
Publication of JPS60248047A publication Critical patent/JPS60248047A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/46Interconnection of networks
    • H04L12/4637Interconnected ring systems

Abstract

PURPOSE:To obtain an inexpensive ring type information transmitter with high isochromism by phase-locking a low speed transmission frame to a high speed transmission frame and adopting the high transmission speed as a natural number of multiple of the low speed. CONSTITUTION:A high speed transmission frame signal subject to multiplex in the unit of slots on a high speed signal transmission line 2 is inputted to a high speed signal multiple unit 20. The unit 20 applies S/P conversion to a high speed serial signal or P/S conversion to a parallel signal and transmits the converted result to a high speed bus 4 and stores it to an information exchange memory 40. The information in the memory 40 is subject to phase synchronization with the bus 4 and outputted to a low speed bus 5 whose speed is a half of the multiplex speed. A synchronizing unit 60 matches the phase locking between a high speed frame timing representing a high speed transmission frame and a low speed frame timing, moves the information on the bus 5 to the low speed transmission frame and inputs the result to a low speed signal multiplex unit 30. The unit 30 applies P/S or S/P conversion to the signal and transmits the result to a transfer signal transmission line 3. Similarly, the low speed transmission frame is transferred to the high speed transmission frame in the opposite route.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は伝送速度の異なる2つの伝送フレーム間で相
互に情報を交換するリング形情報伝送装置に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a ring-type information transmission device that mutually exchanges information between two transmission frames having different transmission speeds.

〔従来技術〕[Prior art]

従来この種のリング形情報伝送装置として、第1図に示
すものがあった。図において、1は下記伝送ユニット等
を収容する筐体であり、21・ま高速信号伝送用伝送路
、6は低速信号伝送用伝送路、4は高速バス、5は端末
との信号の送受を行なうための低速バスでβる。また2
0はシリアルの高速信号をパラレルにまたパラレルの高
速信号をシリアルに変換する高速信号多重ユニットであ
り、そのうちパラレルに変換された信号を扱うものが上
記高速バス4である。更に60はシリアルの低速信号を
パラレルに変換し、パラレルの信号をシリアルに変換す
る低速信号多重ユニットであり、40は上記高速バス4
と低速バス5の情報の交換を行なうメモリ、50は上記
低速バス5の信号と、上記低速信号多重ユニット60と
の間で速度の整合を取るメモリ、1だ60は低速伝送フ
レームを生成する同期ユニットである。
As a conventional ring type information transmission device of this type, there has been one shown in FIG. In the figure, 1 is a housing that accommodates the following transmission units, etc., 21 is a transmission line for high-speed signal transmission, 6 is a transmission line for low-speed signal transmission, 4 is a high-speed bus, and 5 is a case for sending and receiving signals with terminals. Beta on the low speed bus to get there. Also 2
0 is a high-speed signal multiplexing unit that converts a serial high-speed signal into parallel and a parallel high-speed signal into serial, and among these, the high-speed bus 4 handles the signal converted into parallel. Furthermore, 60 is a low-speed signal multiplexing unit that converts a serial low-speed signal into parallel and a parallel signal into serial;
and a memory for exchanging information between the low-speed bus 5 and the low-speed bus 5, 50 a memory for speed matching between the low-speed bus 5 signal and the low-speed signal multiplexing unit 60, and 1 and 60 a synchronizer for generating low-speed transmission frames. It is a unit.

次に動作について説明する。高速信号伝送用伝送路2上
を情報は第2図に示した高速伝送フレームにスロット単
位で多重されて伝送されており、商運信号多重ユニット
20では第2図に見られる高速伝送フレーム上の第1ス
ロツト1aの情報を高速バス4上の28に、また2aの
情報はメモリ40の6aに格納される。6aの情報は高
速バスと位相同期がとれた多重速度が自然数倍の低速バ
ス5上の4aに出力され、4aの情報は速度整合メモリ
50上の5aに格納される。この5aの情報は高速伝送
フレームを生成するクロックとは全く独立なりロックで
生成され、フレーム先頭同志で位相同期のとれていない
低速伝送フレーム上の第1スロツ)6aに多重される。
Next, the operation will be explained. Information is transmitted on the transmission line 2 for high-speed signal transmission by being multiplexed in slot units into the high-speed transmission frame shown in FIG. Information on the first slot 1a is stored in 28 on the high-speed bus 4, and information on slot 2a is stored in 6a of the memory 40. The information 6a is outputted to 4a on the low-speed bus 5 whose multiple speed is a natural number multiple that is phase-synchronized with the high-speed bus, and the information 4a is stored in 5a on the speed matching memory 50. This information 5a is generated in a locked manner, completely independent of the clock that generates the high-speed transmission frame, and is multiplexed into the first slot 6a on the low-speed transmission frame, which is not phase-synchronized at the beginning of the frame.

この様に高速伝送フレーム上の第1スロツ)1aの情報
が低速伝送フレーム上の第1スロツト6aに移される。
In this way, the information in the first slot 1a on the high-speed transmission frame is transferred to the first slot 6a on the low-speed transmission frame.

同様にして1b、Icの情報も6b、6cに移される。Similarly, information on 1b and Ic is also transferred to 6b and 6c.

また低速伝送フレーム上の情報も上記の逆ルートをたど
り同様に高速伝送フレームに移す事ができる。
Information on the low-speed transmission frame can also be transferred to the high-speed transmission frame in the same way by following the above-mentioned reverse route.

従来のリング形情報伝送装置は以上のように構成きれて
いるので、2つの伝送フレームの伝送速度が互いに独立
して、おり、高速伝送フレーム上の情報と低速伝送フレ
ーム上の情報を交換するために、速度整合用のメモリが
必要でおるという欠点があった。
Since the conventional ring-type information transmission device is configured as described above, the transmission speeds of the two transmission frames are independent of each other, and the information on the high-speed transmission frame and the information on the low-speed transmission frame are exchanged. However, it had the disadvantage of requiring memory for speed matching.

〔発明の概要〕[Summary of the invention]

この発明は上記のような従来のものの欠点を除去するた
めになされたもので、高速伝送フレームの伝送速度を低
速伝送フレームの伝送速度の自然数倍にし、かつ相互の
フレームの先頭同志で位相同期をとる事により、速度整
合用メモリを不要としたリング形情報伝送装置を提供す
る事を目的としている。
This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and it increases the transmission speed of high-speed transmission frames by a natural number multiple of the transmission speed of low-speed transmission frames, and synchronizes the phases at the beginning of each frame. The purpose of this invention is to provide a ring-type information transmission device that does not require a memory for speed matching.

〔発明の実施例〕[Embodiments of the invention]

以下、この発明の一実施例を第8図に基づいて説明する
。第8図において1は上記ユニット等を収容する筐体、
2は高速信号伝送用伝送路、6は低速信号伝送用伝送路
、4は高速バス、5は端末との信号のやりとりを行なう
ための低速バスである。更に、20はシリアルの高速信
号をパラレルにパラレルの信号をシリアルに変換する高
速信号多重ユニットであり、このうちパラレルに変換さ
れた信号を扱うのが上記高速バス4である。また、60
はシリアルの低速信号をパラレルに変換し、またパラレ
ルの信号をシリアルに変換する低速信号多重ユニットで
あり、40は関連バス4と低速バス5の情報の交換を行
なうメモリである。
An embodiment of the present invention will be described below with reference to FIG. In FIG. 8, 1 is a casing that houses the above unit, etc.;
2 is a transmission line for high-speed signal transmission, 6 is a transmission line for low-speed signal transmission, 4 is a high-speed bus, and 5 is a low-speed bus for exchanging signals with the terminal. Further, 20 is a high-speed signal multiplexing unit that converts serial high-speed signals into parallel signals and converts parallel signals into serial signals, of which the high-speed bus 4 handles the signals converted into parallel signals. Also, 60
is a low-speed signal multiplexing unit that converts a serial low-speed signal into parallel and converts a parallel signal into serial; 40 is a memory for exchanging information between the related bus 4 and the low-speed bus 5;

同期ユニット60は高速信号多重ユニット20が高速伝
送フレームから抽出したクロックを2分周したクロック
により、高速伝送フレームの伝送速度の”/n (nは
自然数)の伝送速度を持つ低速伝送フレームを生成する
The synchronization unit 60 generates a low-speed transmission frame having a transmission speed equal to "/n" (n is a natural number) of the transmission speed of the high-speed transmission frame using a clock obtained by dividing the clock frequency extracted from the high-speed transmission frame by 2 by the high-speed signal multiplexing unit 20. do.

次に高速伝送フレームの伝送速度が低速伝送フレームの
伝送速度の1/2の場合について動作の説明を行なう。
Next, the operation will be explained in the case where the transmission speed of the high-speed transmission frame is 1/2 of the transmission speed of the low-speed transmission frame.

高速信号伝送用伝送路2上を情報は第4図に示した高速
伝送フレームにスロット単位で多重されて伝送されてお
り、高速信号多重ユニット4では第4図に見られるよう
に高速伝送フレーム上の第1スロツ)1aの情報を高速
バス4上の2a[、この2aの情報はメモリ40の6a
に格納される。
Information is transmitted on the transmission line 2 for high-speed signal transmission by being multiplexed in slot units into the high-speed transmission frame shown in FIG. 2a on the high-speed bus 4 [, this information on 2a is transferred to 6a on the memory 40.
is stored in

6aの情報は高速バス4と位相同期がとれ多重速度が1
74の低速バス5上の4aに出力される。高速伝送フレ
ームの先頭を示す高速フレームタイミングと低速フレー
ムタイミングの位相同期を合致させる事により低速バス
5上の情報4aは低速伝送7レームの第1スロツ)6a
に移される。同様にして1b、1cの情報も6b、6c
IIC移される。
The information on 6a is phase synchronized with high speed bus 4 and the multiplex speed is 1.
4a on the low-speed bus 5 of 74. By matching the phase synchronization between the high-speed frame timing indicating the beginning of the high-speed transmission frame and the low-speed frame timing, the information 4a on the low-speed bus 5 is transferred to the first slot of the low-speed transmission 7 frames) 6a
will be moved to Similarly, the information of 1b and 1c is also 6b and 6c.
Transferred to IIC.

また低速の伝送フレーム上の情報も上記の逆ルートをた
どり、同様に高速伝送フレームに移す事ができる。
Information on low-speed transmission frames can also be transferred to high-speed transmission frames in the same way by following the above-mentioned reverse route.

なお、上記実施例では伝送速度の異なる2つのリング形
伝送路間での情報の交換について示したが、情報がサイ
クリックに出方されるバス等においても同様の方式をと
る事ができる。
In the above embodiment, information is exchanged between two ring-type transmission lines having different transmission speeds, but a similar method can be used for a bus or the like in which information is output cyclically.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば低速の伝送フレームを
高速の伝送フレームに位相同期させ、伝送速度を高速は
低速の自然数倍にする事により速度整合用のメモリが不
要となり、安価で等時性の高い非常に優れたリング形情
報伝送装置が得られる効果がある。
As described above, according to the present invention, a low-speed transmission frame is phase-synchronized with a high-speed transmission frame, and the high-speed transmission speed is made a natural number multiple of the low-speed transmission speed, thereby eliminating the need for a memory for speed matching, and making it possible to reduce the cost and the cost. This has the effect of providing an excellent ring type information transmission device with high timeliness.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のリング形情報伝送装置の構成を示すブロ
ック図、第2図は第1図の各部の信号の流れを示す動作
図、第8図はこの発明の一実施例によるリング形情報伝
送装置を示すブロック図、第4図は第8図の各部の信号
の流れを示す動作図である。 1・・・筐体、2・・・高速信号伝送用伝送路、6・・
・低速イコ号伝送用伝送路、4・・・高速バス、5・・
・低速バス、20・・・高速信号多重ユニット、60・
・・低速信号多重ユニット、40・・・メモリ、50・
・・速度整合用メモリ、60・・・同期ユニット。 尚、図中、同一符号は同−又は相当部分を示す。 特許出願人 三菱電機株式会社 第1図 第3図 第4図 手続補正書(自発) 2、発明の名称 リング形情報伝送装置 3、補正をする者 事件との関係 特許出願人 住 所 東京都千代田区丸の内二丁目2番3号名 称 
(601)三菱電機株式会社 代表者片山仁八部 5、補正の対象 6、補正の内容 別紙の通り特許請求の範囲を補正する。 7、 添付書類の目録 補正後の特許請求の範囲を記載した書面 1通以上 補正後の特許請求の範囲 伝送速度の異なる複数の伝送フレームが扱われる複数の
信号伝送用伝送路でシリアル−パラレルまたにパラレル
−シリアル変換を行なう複数の信号多重ユニットと、上
記複数の伝送フレームの中で高速伝送フレーム上の情報
と低速伝送フレーム上の情報を交換及び上記複数の信号
多重ユニット間の速度の整合を取る複数のメモリとを封
するリング形情報伝送装置において、上記高速伝送フレ
ームの伝送速度を低速伝送フレームの伝送速度の自然数
の倍率とし、相互のフレームの先頭同志で位相を同期さ
せたことを特徴とするリング形情報伝送装置。
FIG. 1 is a block diagram showing the configuration of a conventional ring-type information transmission device, FIG. 2 is an operation diagram showing the signal flow of each part in FIG. 1, and FIG. 8 is a ring-type information transmission device according to an embodiment of the present invention. FIG. 4 is a block diagram showing the transmission device, and FIG. 4 is an operation diagram showing the flow of signals in each part of FIG. 1... Housing, 2... Transmission path for high-speed signal transmission, 6...
・Transmission line for low-speed equal signal transmission, 4...high-speed bus, 5...
・Low-speed bus, 20...High-speed signal multiplex unit, 60・
...Low-speed signal multiplexing unit, 40...Memory, 50.
...Speed matching memory, 60...Synchronization unit. In the drawings, the same reference numerals indicate the same or corresponding parts. Patent applicant Mitsubishi Electric Corporation Figure 1 Figure 3 Figure 4 Procedural amendment (voluntary) 2. Name of the invention Ring type information transmission device 3. Relationship with the person making the amendment Patent applicant address Chiyoda, Tokyo Ward Marunouchi 2-2-3 Name
(601) Mitsubishi Electric Corporation Representative Hitoshi Katayama Department 5, Subject of Amendment 6, Contents of Amendment The scope of the claims is amended as shown in the attached sheet. 7. List of attached documents A document stating the scope of claims after amendment One or more copies of the scope of claims after amendment A serial-parallel or serial-parallel or a plurality of signal multiplexing units that perform parallel-to-serial conversion, and exchanging information on high-speed transmission frames and information on low-speed transmission frames among the plurality of transmission frames, and matching speeds between the plurality of signal multiplexing units. A ring-type information transmission device that seals a plurality of memories, characterized in that the transmission speed of the high-speed transmission frame is a natural number multiplier of the transmission speed of the low-speed transmission frame, and the phases are synchronized at the beginnings of each frame. A ring-type information transmission device.

Claims (1)

【特許請求の範囲】[Claims] 伝送速度のn々る複数の伝送フレームが扱わiする複数
の信号伝送用伝送路でシリアル−パラレルまたはパラレ
ル−シリアル変換を行なう複数の信号多重ユホットと、
上記複数の伝送フレームの中で高速伝送フレーム上の情
報と低速伝送フレーム上の情報を交換及び上記複数の信
号多重ユニット間の速度の整合を取る複数のメモリとを
有するリング形情報伝送装置において、上記高速伝送フ
レームの伝送速度を低速伝送フレームの伝送速度の自然
数の倍率とし、相互のフレームの先頭同志で位相を同期
はせたことを特徴とするリング形情報伝送装置。
a plurality of signal multiplexing units that perform serial-to-parallel or parallel-to-serial conversion on a plurality of signal transmission transmission paths that handle a plurality of transmission frames of n transmission speeds;
A ring type information transmission device having a plurality of memories for exchanging information on a high-speed transmission frame and information on a low-speed transmission frame among the plurality of transmission frames and matching speeds between the plurality of signal multiplexing units, A ring-shaped information transmission device characterized in that the transmission speed of the high-speed transmission frame is a natural number multiplier of the transmission speed of the low-speed transmission frame, and the phases of the leading ends of each frame are synchronized.
JP10372384A 1984-05-24 1984-05-24 Ring type information transmitter Pending JPS60248047A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10372384A JPS60248047A (en) 1984-05-24 1984-05-24 Ring type information transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10372384A JPS60248047A (en) 1984-05-24 1984-05-24 Ring type information transmitter

Publications (1)

Publication Number Publication Date
JPS60248047A true JPS60248047A (en) 1985-12-07

Family

ID=14361592

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10372384A Pending JPS60248047A (en) 1984-05-24 1984-05-24 Ring type information transmitter

Country Status (1)

Country Link
JP (1) JPS60248047A (en)

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