JPS60230714A - マスタ・スレ−ブ・フリツプフロツプ回路 - Google Patents

マスタ・スレ−ブ・フリツプフロツプ回路

Info

Publication number
JPS60230714A
JPS60230714A JP59086611A JP8661184A JPS60230714A JP S60230714 A JPS60230714 A JP S60230714A JP 59086611 A JP59086611 A JP 59086611A JP 8661184 A JP8661184 A JP 8661184A JP S60230714 A JPS60230714 A JP S60230714A
Authority
JP
Japan
Prior art keywords
slave
clock signal
level
transistor
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59086611A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0147049B2 (enExample
Inventor
Tamio Miyamura
宮村　民男
Takashi Okawa
隆 大川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59086611A priority Critical patent/JPS60230714A/ja
Publication of JPS60230714A publication Critical patent/JPS60230714A/ja
Publication of JPH0147049B2 publication Critical patent/JPH0147049B2/ja
Granted legal-status Critical Current

Links

JP59086611A 1984-04-28 1984-04-28 マスタ・スレ−ブ・フリツプフロツプ回路 Granted JPS60230714A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59086611A JPS60230714A (ja) 1984-04-28 1984-04-28 マスタ・スレ−ブ・フリツプフロツプ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59086611A JPS60230714A (ja) 1984-04-28 1984-04-28 マスタ・スレ−ブ・フリツプフロツプ回路

Publications (2)

Publication Number Publication Date
JPS60230714A true JPS60230714A (ja) 1985-11-16
JPH0147049B2 JPH0147049B2 (enExample) 1989-10-12

Family

ID=13891810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59086611A Granted JPS60230714A (ja) 1984-04-28 1984-04-28 マスタ・スレ−ブ・フリツプフロツプ回路

Country Status (1)

Country Link
JP (1) JPS60230714A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4719366A (en) * 1985-10-11 1988-01-12 Advanced Micro Devices, Inc. Output state protection network for D-type flip-flop
US5485112A (en) * 1988-12-21 1996-01-16 Texas Instruments Incorporated Metastable tolerant latach

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4719366A (en) * 1985-10-11 1988-01-12 Advanced Micro Devices, Inc. Output state protection network for D-type flip-flop
US5485112A (en) * 1988-12-21 1996-01-16 Texas Instruments Incorporated Metastable tolerant latach

Also Published As

Publication number Publication date
JPH0147049B2 (enExample) 1989-10-12

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