JPS6022035U - A/D conversion device - Google Patents
A/D conversion deviceInfo
- Publication number
- JPS6022035U JPS6022035U JP9205183U JP9205183U JPS6022035U JP S6022035 U JPS6022035 U JP S6022035U JP 9205183 U JP9205183 U JP 9205183U JP 9205183 U JP9205183 U JP 9205183U JP S6022035 U JPS6022035 U JP S6022035U
- Authority
- JP
- Japan
- Prior art keywords
- analog
- converter
- amount
- shift
- model registration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のA/D変換装置のブロック図、第2図は
本考案の実施例に係るA/D変換装置のブロック図、第
3図は第2図に示すA/D変換装置の動作を説明するフ
ローチャート、第4図は第2図に示すA/D変換器の作
動範囲を示すグラフである。
2・・・サンプルホールド回路、4・・・トライステー
トバッファ、6−A/D変換器、7a、7b、7C・・
・アナログシフト回路、8a、8b、8c・・・信号発
生装置、9・・・マルチプレクサ、10・・・制御装置
。FIG. 1 is a block diagram of a conventional A/D converter, FIG. 2 is a block diagram of an A/D converter according to an embodiment of the present invention, and FIG. 3 is a block diagram of the A/D converter shown in FIG. A flowchart explaining the operation, and FIG. 4 is a graph showing the operating range of the A/D converter shown in FIG. 2. 2... Sample hold circuit, 4... Tri-state buffer, 6-A/D converter, 7a, 7b, 7C...
- Analog shift circuit, 8a, 8b, 8c...signal generator, 9...multiplexer, 10...control device.
Claims (1)
回路と、このサンプルホールド回路に保持されたアナロ
グ量をディジタル量に変換するA/D変換器とを備えた
A/D変換装置において、前記サンプルホールド回路で
保持されたアナログ量をある所定量シフトするアナログ
シフト手段と、このアナログシフト手段における最適の
シフト量を判断する判断手段と、前記サンプルホール1
〜回路で保持されたアナログ量から前記判断手段により
判断された最適のシフト量をシフトした残りのアナログ
量を前記A/D変換器に入力する入力手段と、前記A/
D変換器で得られたディジタル量に前記最適のシフト量
に対応するディジタル量を加算する加算手段とを設けた
ことを特徴とするA/D変換器。 2 実用新案登録請求の範囲第1項において、前記シフ
トする所定量は、前記A/D変換器のアナログ入力範囲
に等しい量であることを特徴とするA/D変換器。 3 実用新案登録請求の範囲第1項において、前記アナ
ログシフト手段は、前記A/D変換器のアナログ入力範
囲に等しいシフト量の整数倍を順次シフトする複数のア
ナログシフト回路であることを特徴とするA/D変換変
換性装置 実用新案登録請求の範囲第1項において、前
記判断手段は、前記サンプルホールド回路で保持された
アナログ量から前記所定量をシフトしたときの量の正負
を判断する構成であることを特徴とするA/D変換器。 5 実用新案登録請求の範囲第1項において、前記入力
手段は、前記判断手段が判断した最適のシフト量をシフ
トした残りのアナログ量を前記A/D変換器に入力する
マルチプレクサであることを特徴とするA/D変換装置
。[Claims for Utility Model Registration] 1. An A/D that includes a sample-and-hold circuit that holds manually input analog quantities and an A/D converter that converts the analog quantities held in this sample-and-hold circuit into digital quantities. In the conversion device, an analog shift means for shifting the analog quantity held by the sample hold circuit by a certain predetermined amount, a judgment means for determining the optimum shift amount in the analog shift means, and the sample hole 1
~ input means for inputting the remaining analog quantity, obtained by shifting the optimum shift quantity determined by the determination means from the analog quantity held in the circuit, into the A/D converter; and the A/D converter;
An A/D converter comprising: an adding means for adding a digital amount corresponding to the optimum shift amount to a digital amount obtained by the D converter. 2 Utility Model Registration The A/D converter according to claim 1, wherein the predetermined amount to be shifted is an amount equal to an analog input range of the A/D converter. 3. Utility model registration Claim 1, characterized in that the analog shift means is a plurality of analog shift circuits that sequentially shift an integral multiple of a shift amount equal to the analog input range of the A/D converter. An A/D conversion device that performs utility model registration Claim 1, wherein the determining means determines whether the predetermined amount is positive or negative when the predetermined amount is shifted from the analog amount held in the sample and hold circuit. An A/D converter characterized by: 5. Utility model registration Claim 1, characterized in that the input means is a multiplexer that inputs the analog amount remaining after shifting the optimum shift amount determined by the determination means to the A/D converter. A/D conversion device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9205183U JPS6022035U (en) | 1983-06-17 | 1983-06-17 | A/D conversion device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9205183U JPS6022035U (en) | 1983-06-17 | 1983-06-17 | A/D conversion device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6022035U true JPS6022035U (en) | 1985-02-15 |
Family
ID=30222181
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9205183U Pending JPS6022035U (en) | 1983-06-17 | 1983-06-17 | A/D conversion device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6022035U (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6359023A (en) * | 1986-08-27 | 1988-03-14 | Matsushita Electric Ind Co Ltd | A/d converter |
JPH0193061U (en) * | 1987-12-11 | 1989-06-19 | ||
JPH04320110A (en) * | 1991-04-19 | 1992-11-10 | Fuji Photo Film Co Ltd | A/d converter |
JP2012095107A (en) * | 2010-10-27 | 2012-05-17 | Toyota Motor Corp | Ad conversion system |
-
1983
- 1983-06-17 JP JP9205183U patent/JPS6022035U/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6359023A (en) * | 1986-08-27 | 1988-03-14 | Matsushita Electric Ind Co Ltd | A/d converter |
JPH0193061U (en) * | 1987-12-11 | 1989-06-19 | ||
JPH04320110A (en) * | 1991-04-19 | 1992-11-10 | Fuji Photo Film Co Ltd | A/d converter |
JP2012095107A (en) * | 2010-10-27 | 2012-05-17 | Toyota Motor Corp | Ad conversion system |
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