JPS6020943Y2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6020943Y2
JPS6020943Y2 JP1979119769U JP11976979U JPS6020943Y2 JP S6020943 Y2 JPS6020943 Y2 JP S6020943Y2 JP 1979119769 U JP1979119769 U JP 1979119769U JP 11976979 U JP11976979 U JP 11976979U JP S6020943 Y2 JPS6020943 Y2 JP S6020943Y2
Authority
JP
Japan
Prior art keywords
metal case
semiconductor element
mold plate
insert mold
external connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1979119769U
Other languages
English (en)
Japanese (ja)
Other versions
JPS5636162U (enExample
Inventor
史朗 岩谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1979119769U priority Critical patent/JPS6020943Y2/ja
Priority to US06/182,404 priority patent/US4392151A/en
Publication of JPS5636162U publication Critical patent/JPS5636162U/ja
Application granted granted Critical
Publication of JPS6020943Y2 publication Critical patent/JPS6020943Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/047Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4823Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a pin of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP1979119769U 1979-08-29 1979-08-29 半導体装置 Expired JPS6020943Y2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1979119769U JPS6020943Y2 (ja) 1979-08-29 1979-08-29 半導体装置
US06/182,404 US4392151A (en) 1979-08-29 1980-08-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1979119769U JPS6020943Y2 (ja) 1979-08-29 1979-08-29 半導体装置

Publications (2)

Publication Number Publication Date
JPS5636162U JPS5636162U (enExample) 1981-04-07
JPS6020943Y2 true JPS6020943Y2 (ja) 1985-06-22

Family

ID=14769731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1979119769U Expired JPS6020943Y2 (ja) 1979-08-29 1979-08-29 半導体装置

Country Status (2)

Country Link
US (1) US4392151A (enExample)
JP (1) JPS6020943Y2 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5746662A (en) * 1980-09-04 1982-03-17 Toshiba Corp Semiconductor rectifier
JPH0233365Y2 (enExample) * 1985-05-02 1990-09-07
JPH0740600B2 (ja) * 1987-04-30 1995-05-01 三菱電機株式会社 半導体装置
JPH02155256A (ja) * 1988-12-08 1990-06-14 Mitsubishi Electric Corp 半導体装置
EP0400177A1 (de) * 1989-05-31 1990-12-05 Siemens Aktiengesellschaft Verbindung eines Halbleiterbauelements mit einem Metallträger
DE4115043A1 (de) * 1991-05-08 1997-07-17 Gen Electric Dichtgepackte Verbindungsstruktur, die eine Kammer enthält
JP2907186B2 (ja) * 1997-05-19 1999-06-21 日本電気株式会社 半導体装置、その製造方法
JP3003638B2 (ja) * 1997-08-05 2000-01-31 日本電気株式会社 半導体装置、その製造方法
JP3939429B2 (ja) * 1998-04-02 2007-07-04 沖電気工業株式会社 半導体装置
US6949824B1 (en) * 2000-04-12 2005-09-27 Micron Technology, Inc. Internal package heat dissipator
US6930397B2 (en) * 2001-03-28 2005-08-16 International Rectifier Corporation Surface mounted package with die bottom spaced from support board
US7476964B2 (en) * 2001-06-18 2009-01-13 International Rectifier Corporation High voltage semiconductor device housing with increased clearance between housing can and die for improved flux flushing
US6784540B2 (en) 2001-10-10 2004-08-31 International Rectifier Corp. Semiconductor device package with improved cooling
US7579697B2 (en) 2002-07-15 2009-08-25 International Rectifier Corporation Arrangement for high frequency application
US20050269677A1 (en) * 2004-05-28 2005-12-08 Martin Standing Preparation of front contact for surface mounting
JP4538359B2 (ja) * 2005-03-31 2010-09-08 株式会社日立産機システム 電気回路モジュール
US7230333B2 (en) 2005-04-21 2007-06-12 International Rectifier Corporation Semiconductor package
TWI365516B (en) * 2005-04-22 2012-06-01 Int Rectifier Corp Chip-scale package
TW201011869A (en) * 2008-09-10 2010-03-16 Cyntec Co Ltd Chip package structure

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3763403A (en) * 1972-03-01 1973-10-02 Gen Electric Isolated heat-sink semiconductor device
JPS4943722U (enExample) * 1972-07-21 1974-04-17
US3820153A (en) * 1972-08-28 1974-06-25 Zyrotron Ind Inc Plurality of semiconductor elements mounted on common base
JPS50137445A (enExample) * 1974-04-18 1975-10-31
US3920114A (en) * 1974-09-09 1975-11-18 Scm Corp Release and blocking mechanism for power operated typewriters
DE2610136A1 (de) * 1976-03-11 1977-09-22 Bosch Gmbh Robert Spannungsregler fuer generatoren
JPS5315763A (en) * 1976-07-28 1978-02-14 Hitachi Ltd Resin sealed type semiconductor device
US4330790A (en) * 1980-03-24 1982-05-18 National Semiconductor Corporation Tape operated semiconductor device packaging

Also Published As

Publication number Publication date
US4392151A (en) 1983-07-05
JPS5636162U (enExample) 1981-04-07

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