JPS60190069U - Printed board - Google Patents

Printed board

Info

Publication number
JPS60190069U
JPS60190069U JP7742784U JP7742784U JPS60190069U JP S60190069 U JPS60190069 U JP S60190069U JP 7742784 U JP7742784 U JP 7742784U JP 7742784 U JP7742784 U JP 7742784U JP S60190069 U JPS60190069 U JP S60190069U
Authority
JP
Japan
Prior art keywords
printed board
abstract
circuit board
printed circuit
printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7742784U
Other languages
Japanese (ja)
Inventor
久雄 山里
堀　美佐雄
Original Assignee
シャープ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Priority to JP7742784U priority Critical patent/JPS60190069U/en
Publication of JPS60190069U publication Critical patent/JPS60190069U/en
Pending legal-status Critical Current

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  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案のプリント基板の一実施例を示す要部平
面図、第２図は第１図の要部断面図、第３図はプリント
パターンの長さと剥離に至るまでの時間との関係図、第
４図は従来例のプリント基板の要部平面図、第５図は第
４図の要部断面図である。 符号、１：フラットパッケージ澤山ｓｉ、−’　２　：
不使用端子、３．　３’：不使用端子をハンダ付けする
プリントパターン、５ニブリント基板。Fig. 1 is a plan view of the main part showing an embodiment of the printed circuit board of the present invention, Fig. 2 is a cross-sectional view of the main part of Fig. 1, and Fig. 3 shows the relationship between the length of the printed pattern and the time until peeling. 4 is a plan view of the main part of a conventional printed circuit board, and FIG. 5 is a sectional view of the main part of FIG. 4. Code, 1: Flat package Sawayama si, -' 2:
Unused terminals, 3. 3': Printed pattern for soldering unused terminals, 5 print board.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] フラットパッケージ型ＬＳＩを装着するプリント基板に
おいて、上ＥＬＳＩの不使用端子をハンダ付けするプリ
ントパターンに放熱部を設けたことを特徴とするプリン
ト基板。A printed circuit board on which a flat package type LSI is mounted, characterized in that a heat radiation part is provided in a printed pattern to which unused terminals of an upper ELSI are soldered.
JP7742784U 1984-05-25 1984-05-25 Printed board Pending JPS60190069U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7742784U JPS60190069U (en) 1984-05-25 1984-05-25 Printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7742784U JPS60190069U (en) 1984-05-25 1984-05-25 Printed board

Publications (1)

Publication Number Publication Date
JPS60190069U true JPS60190069U (en) 1985-12-16

Family

ID=30620482

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7742784U Pending JPS60190069U (en) 1984-05-25 1984-05-25 Printed board

Country Status (1)

Country Link
JP (1) JPS60190069U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856491A (en) * 1981-09-30 1983-04-04 株式会社東芝 Printed circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856491A (en) * 1981-09-30 1983-04-04 株式会社東芝 Printed circuit board

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