JPS60189221A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS60189221A
JPS60189221A JP4508184A JP4508184A JPS60189221A JP S60189221 A JPS60189221 A JP S60189221A JP 4508184 A JP4508184 A JP 4508184A JP 4508184 A JP4508184 A JP 4508184A JP S60189221 A JPS60189221 A JP S60189221A
Authority
JP
Japan
Prior art keywords
thin film
film
etching
single crystal
plane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4508184A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0574218B2 (enrdf_load_stackoverflow
Inventor
Akira Kuroyanagi
晃 黒柳
Akihiro Niimi
彰浩 新美
Shikio Morita
森田 信貴男
Shigeo Kanazawa
重雄 金澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP4508184A priority Critical patent/JPS60189221A/ja
Publication of JPS60189221A publication Critical patent/JPS60189221A/ja
Publication of JPH0574218B2 publication Critical patent/JPH0574218B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP4508184A 1984-03-08 1984-03-08 半導体装置の製造方法 Granted JPS60189221A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4508184A JPS60189221A (ja) 1984-03-08 1984-03-08 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4508184A JPS60189221A (ja) 1984-03-08 1984-03-08 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS60189221A true JPS60189221A (ja) 1985-09-26
JPH0574218B2 JPH0574218B2 (enrdf_load_stackoverflow) 1993-10-18

Family

ID=12709375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4508184A Granted JPS60189221A (ja) 1984-03-08 1984-03-08 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS60189221A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5420074A (en) * 1990-07-05 1995-05-30 Kabushiki Kaisha Toshiba Method for burying low resistance material in a contact hole

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594015A (ja) * 1982-06-30 1984-01-10 Fujitsu Ltd 半導体装置及びその製造方法
JPS6024013A (ja) * 1983-07-20 1985-02-06 Toshiba Corp 半導体装置の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594015A (ja) * 1982-06-30 1984-01-10 Fujitsu Ltd 半導体装置及びその製造方法
JPS6024013A (ja) * 1983-07-20 1985-02-06 Toshiba Corp 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5420074A (en) * 1990-07-05 1995-05-30 Kabushiki Kaisha Toshiba Method for burying low resistance material in a contact hole

Also Published As

Publication number Publication date
JPH0574218B2 (enrdf_load_stackoverflow) 1993-10-18

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