JPS60189052A - メモリアクセス制御装置 - Google Patents

メモリアクセス制御装置

Info

Publication number
JPS60189052A
JPS60189052A JP4350084A JP4350084A JPS60189052A JP S60189052 A JPS60189052 A JP S60189052A JP 4350084 A JP4350084 A JP 4350084A JP 4350084 A JP4350084 A JP 4350084A JP S60189052 A JPS60189052 A JP S60189052A
Authority
JP
Japan
Prior art keywords
memory
byte
bus
memory access
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4350084A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0120781B2 (enrdf_load_stackoverflow
Inventor
Nobuo Karaki
信雄 唐木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Epson Corp
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK, Epson Corp filed Critical Seiko Epson Corp
Priority to JP4350084A priority Critical patent/JPS60189052A/ja
Publication of JPS60189052A publication Critical patent/JPS60189052A/ja
Publication of JPH0120781B2 publication Critical patent/JPH0120781B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/285Halt processor DMA
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4009Coupling between buses with data restructuring
    • G06F13/4018Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
JP4350084A 1984-03-07 1984-03-07 メモリアクセス制御装置 Granted JPS60189052A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4350084A JPS60189052A (ja) 1984-03-07 1984-03-07 メモリアクセス制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4350084A JPS60189052A (ja) 1984-03-07 1984-03-07 メモリアクセス制御装置

Publications (2)

Publication Number Publication Date
JPS60189052A true JPS60189052A (ja) 1985-09-26
JPH0120781B2 JPH0120781B2 (enrdf_load_stackoverflow) 1989-04-18

Family

ID=12665432

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4350084A Granted JPS60189052A (ja) 1984-03-07 1984-03-07 メモリアクセス制御装置

Country Status (1)

Country Link
JP (1) JPS60189052A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6298449A (ja) * 1985-09-30 1987-05-07 エイ・ティ・アンド・ティ・コーポレーション デ−タ通信システム
JPS62276655A (ja) * 1986-05-26 1987-12-01 Pfu Ltd Dma転送方式

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6298449A (ja) * 1985-09-30 1987-05-07 エイ・ティ・アンド・ティ・コーポレーション デ−タ通信システム
JPS62276655A (ja) * 1986-05-26 1987-12-01 Pfu Ltd Dma転送方式

Also Published As

Publication number Publication date
JPH0120781B2 (enrdf_load_stackoverflow) 1989-04-18

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term