JPS601838A - Semiconductor device - Google Patents

Abstract

PURPOSE:To solve a problem regarding a thermal stress due to the difference of the thermal expansion coefficients of each material without resulting in a cost-up by connecting a first conductive lead to a projecting electrode formed to the peripheral section of a semiconductor element and extending a second conductive lead connected to the projecting electrode from the projecting section of a base film. CONSTITUTION:Conductive leads 3 constituting a film carrier together with projecting electrodes extending from a base film 4 are connected to projecting electrodes 2 formed to the peripheral section of a semiconductor element 1. A conductive lead 8 for a power supply line extends into the semiconductor element 1 from the base film 4, and is branched, and is connected to projecting electrodes 6 and 6a formed in the semiconductor element 1. The conductive lead 8 is extended from a projecting section 4a of which one part of the base film 4 projects into the semiconductor element 1, and the projecting section 4a functions as a support base for the conductive lead 8, and has an effect on the prevention of an edge-touch. Both said projecting electrodes 2 and conductive leads 3 and both said projecting electrodes 6 and 6a and conductive lead 8 are thermocompression-bonded simultaneously by a bonding tool 9.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a so-called gigantic bonding method in which a film carrier consisting of a flexible film and a large number of conductive leads fixed thereto, and a semiconductor element having a large number of protruding electrodes are connected by thermocompression bonding. The present invention relates to a bonding type semiconductor device.

Conventional configurations and their problems Normally, wiring within a semiconductor device is roughly divided into signal lines and power supply lines, but in the case of semiconductor devices that require large currents,
Voltage drop due to wiring resistance becomes a problem. Usually, wiring within semiconductor devices is formed by sputtering or vacuum evaporation, so it is industrially impossible to make the wiring thick. Therefore, in order to suppress the voltage drop within the permissible limit, semiconductor devices are used to connect power lines. Countermeasures have been taken such as widening the wiring width and adopting multilayer wiring, but the former method increases the device area, while the latter method not only increases the number of manufacturing steps but also complicates the wiring structure. This has the drawback of lowering yield.

Therefore, a gigantic bonding type semiconductor device has been proposed which can reduce the voltage drop in the power supply line without taking the above-mentioned cost-increasing measures for semiconductor elements that require a large current.

A conventional example of such a gigantic bonding type semiconductor device is shown in FIGS. 1a and 1b. FIG. 1 is a sectional view taken along line 8-A' in FIG. 1a.

Conductive leads 3 extending from a base film 4 and constituting a film carrier are connected to protruding electrodes 2 provided on the periphery of the semiconductor element 1 .

Further, protruding electrodes 6, 6a and 6b for power supply lines are provided inside and around the semiconductor element 1, and conductive leads 5 and 6a extending from the base film 4 are connected to the protruding electrodes 6, 6a and 6b.
Connect to a and 6b. This series of connections is made using the bonding tool 7 shown in FIG.
6b and conductive leads 3, 5, and 6a at the same time by thermocompression bonding.

Incidentally, the protruding electrode 6b has the role of preventing the occurrence of an electrical short circuit (hereinafter referred to as edge touch) between the conductive lead 5 extending into the interior of the semiconductor element 1 and the end face portion of the semiconductor element 1.

According to the conventional example shown in FIG. 1, the lead lines can be taken out inside and around the semiconductor element 1 at any number of locations. 1, conductive leads etc., 5a is usually 18μm1
Since a 36 μm copper foil is used, there is an effect that the voltage drop can be ignored without incurring a cost amplifier.

However, by connecting the conductive lead 6 between the protruding electrode 6 and the protruding electrode 6b and the conductive lead 6a between the protruding electrode 6 and the protruding electrode 68, the main material of the semiconductor element 1 (usually S
i) and the main material of the conductive leads 6 and 5a (usually Cu)
Thermal stress occurs due to the difference in the coefficient of thermal expansion of the conductive leads 6, 6a and 6b, and the conductive leads 5 and 5a are separated or disconnected.

Purpose of the Invention The present invention has been made to eliminate the drawbacks of the conventional example, and provides a semiconductor device that can completely solve the problem of thermal stress caused by differences in the coefficient of thermal expansion of each material without increasing costs. This is what we are trying to provide.

Structure of the Invention In order to achieve this object, a semiconductor device according to the present invention includes a film carrier in which first and second conductive leads are formed on a flexible base film, and a semiconductor device in which protruding electrodes are formed on the periphery and inside. the semiconductor element, the first conductive lead is connected to the protruding electrode formed on the periphery of the semiconductor element, and the semiconductor The second conductive lead connected to the protruding electrode formed inside the element is extended. According to this configuration, thermal stress does not occur because the second conductive lead is simply connected to the protruding electrode formed inside the semiconductor element, and the second conductive lead and the end face of the semiconductor element are connected to each other. Edge touch with the base film is completely prevented by the overhanging portion of the base film that overhangs into the semiconductor element.

Description of examples An embodiment of the present invention will be described below with reference to FIGS. 2a and 2b.

FIG. 2 is a sectional view along line 8' of FIG. 2a. Also, the same numbers are given to the same parts as in the conventional example.

Conductive leads 3 extending from a base film 4 and constituting a film carrier are connected to protruding electrodes 2 provided on the periphery of the semiconductor element 1 .

In addition, the conductive lead 8 for the power line is connected to the base film 4.
It extends into the interior of the semiconductor element 1, is branched off, and is connected to protrusion electrodes 6 and 6a provided inside the semiconductor element 1. Here, the conductive lead 8 extends from a projecting portion 4a in which a portion of the base film 4 projects into the inside of the semiconductor element 1, and the projecting portion 4a extends from the conductive lead 8.
It serves as a support base and is effective in preventing edge touch.

The above protruding electrodes 2, conductive leads 3, protruding electrodes 6 and 6a
and the conductive lead 8 are connected to the bonding tool 9 shown in FIG.
At the same time, they are thermocompressed.

Here, the height of the protruding electrodes 2, 6 and 6a is usually several μm to
The base film 4 has a thickness of about 50 μm to 200 μm, so the bonding tool 9 is thermocompression bonded with a concave portion 10 at the tip as shown in FIG. By adopting the structure of the embodiment described above, in addition to being able to prevent edge touching, since the conductive leads 8 are only connected to the protruding electrodes 6 and 6a, heat due to the difference in thermal expansion coefficient between the semiconductor element 1 and the conductive leads 8 can be prevented. No stress is generated, and the protruding electrodes 6 and 6a do not peel off, nor does the conductive lead 8 break. Here, as described above, since the conductive leads 8 are not fixed by the overhanging portions 4a of the base film 4, thermal stress due to the difference in thermal expansion coefficient between the semiconductor element 1 and the conductive leads 8 is not a problem, but the conductive leads 8 Since the conductive leads 8 are longer than the conductive leads 3, they are susceptible to thermal stress due to the difference in coefficient of thermal expansion between the base film 4 and the conductive leads, which may cause problems. This problem is solved because the conductive lead 8 is curved by the bonding tool 10 as shown in part B of Figure 2, and this curved part absorbs the thermal stress due to the difference in thermal expansion coefficient between the base film 4 and the conductive lead 8. Solvable. Further, the curved portion has the effect of absorbing thermal stress due to the difference in thermal expansion coefficient between the semiconductor element 1 and the conductive lead 8 described above.

Further, it goes without saying that the scope of the present invention includes a bump terminal formed in the same manufacturing process as the protruding electrode 2 at the lower part of the protruding portion 4a of the base film 4 in the above embodiment.

By implementing the detailed embodiment of the present invention, it is possible to reduce the number of man-hours in the film carrier manufacturing process and thermocompression bonding to the conventional level, and reduce the area of semiconductor elements even in semiconductor devices with large power consumption. Therefore, it is possible to provide a semiconductor device that can suppress voltage drop due to wiring. A great advantage of the present invention is that it can completely solve the conventional problems of edge touch and thermal stress caused by differences in the coefficient of thermal expansion of each material.

In addition, in the explanation of the embodiment, the power supply wiring was described, but
It is clear that the present invention can also be applied to signal wiring.

[Brief explanation of the drawing]

FIG. 1a is a plan view showing a conventional gigantic boarding type semiconductor device in which conductive leads are extended into a semiconductor element;
FIG. 1 is a sectional view taken along the line A-A' in FIG. 1a, FIG. 2a is a plan view showing an embodiment of the semiconductor device of the present invention, and FIG. The cross-sectional view and FIG. 3 are diagrams showing the shape of the tip of the bonding tool used in the semiconductor device of the present invention.
3-...First conductive lead, 4...Base film, 4a...Protruding portion, 6.6a...Internal protruding electrode, 8...Second conductive lead Lead. Name of agent: Patent attorney Toshio Nakao and 1 other person Compilation 1
figure

Claims (3)

[Claims] (1) The first layer is attached to a flexible base film. The film carrier includes a film carrier on which a second conductive lead is formed, and a semiconductor element on which protruding electrodes are formed on the periphery and inside the semiconductor element, and the first conductive lead is connected to the protruding electrode formed on the periphery of the semiconductor element. and the second conductive lead connected to the protruding electrode formed inside the semiconductor element extends from an overhanging part of the base film extending inward from a peripheral part of the semiconductor element. A semiconductor device characterized by: (2) The semiconductor device 0 according to claim (1), wherein the second conductive lead is curved and connected to a protruding electrode formed inside the semiconductor element. (3) The semiconductor device according to claim (1), wherein the second conductive lead is branched and connected to a plurality of protruding electrodes formed inside the semiconductor element.