JPS60181100U - Wiring tester - Google Patents

Wiring tester

Info

Publication number
JPS60181100U
JPS60181100U JP6811184U JP6811184U JPS60181100U JP S60181100 U JPS60181100 U JP S60181100U JP 6811184 U JP6811184 U JP 6811184U JP 6811184 U JP6811184 U JP 6811184U JP S60181100 U JPS60181100 U JP S60181100U
Authority
JP
Japan
Prior art keywords
wiring
data
memory
tester
sequentially
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6811184U
Other languages
Japanese (ja)
Inventor
義明 塚田
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP6811184U priority Critical patent/JPS60181100U/en
Publication of JPS60181100U publication Critical patent/JPS60181100U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来用いられた布線表の一例を示す図、第2図
は本考案の一実施例を示すブロック図である。 1・・・・・・基本データを作るための良品パッケージ
、2・・・・・・布線状態読取回路、3・・・・・・記
憶器、4・・・・・・データ読み出回路、5・・・・・
・表示器、6・・・・・・製作用ユニバーサル基板、7
・・・・・・布線状態読取回路、8・・・・・・比較器
、9・・・・・・不良表示器。
FIG. 1 is a diagram showing an example of a conventional wiring table, and FIG. 2 is a block diagram showing an embodiment of the present invention. 1...Good package for creating basic data, 2...Wiring status reading circuit, 3...Memory device, 4...Data reading circuit , 5...
・Display unit, 6...Universal board for production, 7
...Wiring status reading circuit, 8...Comparator, 9...Failure indicator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板の布線状態を読み取る布線状態読取回路と、入力さ
れた布線データを記憶する記憶器と、該記憶部に記憶さ
れたデータを順次読み出すデータ読出回路と、該データ
読出回路で順次読み出された記憶布線データを表示する
表示器と、前記順次読み出された記憶布線データと該記
憶布線データに基づい布線した結果を示す布線入力デー
タとを比較する比較器とを含むことを特徴とする布線試
験器。
A wiring state reading circuit that reads the wiring state of the board; a memory device that stores input wiring data; a data read circuit that sequentially reads out the data stored in the storage section; a display device that displays the output memory wiring data; and a comparator that compares the sequentially read memory wiring data with wiring input data indicating the result of wiring based on the memory wiring data. A wiring tester comprising:
JP6811184U 1984-05-10 1984-05-10 Wiring tester Pending JPS60181100U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6811184U JPS60181100U (en) 1984-05-10 1984-05-10 Wiring tester

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6811184U JPS60181100U (en) 1984-05-10 1984-05-10 Wiring tester

Publications (1)

Publication Number Publication Date
JPS60181100U true JPS60181100U (en) 1985-12-02

Family

ID=30602563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6811184U Pending JPS60181100U (en) 1984-05-10 1984-05-10 Wiring tester

Country Status (1)

Country Link
JP (1) JPS60181100U (en)

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