JPS60173844A - Manufacture of semiconductor element - Google Patents

Abstract

PURPOSE:To prevent the desorption of a V group element in a compound semiconductor substrate from pin holes existing in a cap by forming a film having the desorption preventive function of the V group element, shaping a polycrystalline compound layer consisting of a substrate constituent on the film and annealing the whole in order to activate the quantity ion implanted in an atmosphere at the pressure of the V group element. CONSTITUTION:Ions are implanted selectively to a predetermined section in a GaAs semi-insulating substrate 1 to form an implantation region 2. An SiO2 film 3 preventing the desorption of As from the GaAs substrate and functioning as a film having an etching rate different from the GaAs substrate is laminated on the surface of the GaAs substrate 1 in 1,000-1,500Angstrom at a temperature of approximately 400 deg.C through a CVD method. GaAs is grown on the film 3 in approximately 1-2mum through an MOCVD method, etc. GaAs on the SiO2 film 3 is laminated as a polycrystalline compound layer 4 at that time. The ion implantation layer 2 is activated through treatment for approximately twenty min at approximately 800 deg.C in an AsH3 atmosphere as an annealing process.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method for manufacturing a semiconductor device, and particularly to an activation annealing method in a process of ion implantation into a compound semiconductor.

(Technical background) Ion implantation technology is an indispensable technology for manufacturing large-scale integrated circuits because of its high controllability and good reproducibility. Particularly in the production of GaAs IC, the evaporation of As from the GaAs substrate must be taken into consideration when using an annealing method after ion implantation, and various methods have been proposed in the past.

Annealing methods can be roughly divided into three types.

The first method is to form a protective film (hereinafter referred to as a cap) on the surface of GaAs, which is one of the compound semiconductors, during annealing.
For example, by forming a silicon oxide film or a silicon nitride film,
GaA was ion-implanted at a temperature of about 0°C for about 20 minutes.
This is a method of heat-treating the s-substrate, and includes cap annealing (C
It is called the ap anneal) method.

The second method is to form a cap on the GaAs surface (capless), mix As H3 gas into a carrier gas from the outside, apply As pressure at a partial pressure of several Torr, and heat the GaAs surface to a temperature of about 800°C. Process at 19 degrees for about 20 minutes,
This is a method of activating implanted ions in GaAs and is called a capless annealing method.

The third method is a method in which heating in heat treatment is performed in a short time, and the annealing is performed using thermal radiation rather than thermal conduction, which is called a flash annealing method.

Each of these annealing methods has advantages and disadvantages.

For example, in the first cap annealing method, GaAs
It is necessary to select the cap material taking into account the occurrence of distortion due to the difference in thermal expansion between the As in the GaAs substrate separates from the hole. Furthermore, the problem with the second capless annealing method is that
It is difficult to control the As pressure in a minute region on the surface of aAs. As for the third method, for short-time annealing, it is necessary to consider the non-uniformity of heat distribution within the sea urchin, and to arrange the heat source so that the heat distribution is uniform. Considerable ingenuity is required in the processing.

(Object of the Invention) The present invention relates to an improvement in the cap annealing method, and its purpose is to solve the drawbacks of the prior art described above. The purpose of the present invention is to provide an annealing method that prevents the group Ⅰ elements constituting the substrate from being separated.

(Summary of the Invention) The main point of the present invention is that the surface of a compound semiconductor substrate into which ions are implanted has a function of preventing group V elements constituting the substrate from leaving the substrate, and is etched with the substrate. The method is to form films having different rates, provide a polycrystalline compound layer of the element constituting the substrate on top of the film, and perform activation annealing of the ion implantation layer in an atmosphere of the group V element pressure.

(Example) The figure is a structural sectional view showing one embodiment of the present invention.

The steps will be explained step by step below.

First, selective ions are implanted into a predetermined portion of a GaAs semi-insulating substrate 1 to form an implanted region 2 . Next, a layer of GaAs is deposited on the surface of the GaAs substrate 1 to prevent As from leaving the GaAs substrate.
5i02 film 3 as a film with a different etching rate from the substrate
are laminated by 100× to 1500× at a temperature of about 400° C. by chemical transport method (CVD method).

Furthermore, I) GaAs is grown to a thickness of about 1 to 2 μm on the layer by MOCVD or the like. At this time, GaAs on the 5i02 film 3 is laminated as a polycrystalline compound layer 4. Next, as an annealing step, approximately 800
The ion-implanted layer 2 is activated by processing at a temperature of about 20 minutes.

Also, when removing the polycrystalline compound layer 4 as a post-annealing process, only the polycrystalline compound layer 4 is removed by appropriately selecting an etchant for GaAs as the intermediate layer. At this time, there is no damage to the ion-implanted layer 2 and the surface of the GaAs substrate 1 (etching can be stopped at the 5i02 film 3, and the 5i02 film 3 can then be easily removed by using an HF-based etchant).

In addition, in the second embodiment, GaA is used as the compound semiconductor substrate.
Although we have explained about s, potassium phosphorus (Gap), indium arsenide (InAs), gallium-aluminum arsenide (GaxA7+□As), etc. may also be used. Anneal in a pressure atmosphere.

(Effects of the Invention) Since the present invention is a method of activation annealing of an ion-implanted layer as described above, it has the following effects.

A first film that prevents the separation of Group V elements constituting the substrate from the surface of the ion-implanted compound semiconductor substrate without removing the ions and has an etching rate different from that of the substrate; By protecting the group V element with a polycrystalline compound layer of the element contained in the polycrystalline compound layer, even if the group V element is detached from the pinhole in the first film, it will not be removed from the polycrystalline compound layer, compared to normal cap annealing. It is possible to supply the group V elements. Further, since the Group V element pressure of the entire system is controlled by the atmosphere of the Group V element pressure, separation of the Group V element from the polycrystalline compound layer can be prevented. From the above two points, it becomes possible to locally control the Group V element in the compound semiconductor substrate and to control the Group V element pressure in the entire system.

[Brief explanation of the drawing]

The figure is an explanatory diagram of an embodiment showing the annealing method according to the present invention. 1... GaAs semi-insulating substrate, 2... ion implantation region, 3... 5i02 film, 4... GaAs polycrystalline layer, 5
...As pressure atmosphere. Patent Applicant: Oki Electric Industry Co., Ltd. Procedural Amendment (Mutsu) 1945 59° or 23B Commissioner of the Japan Patent Office 1 Indication of the case 1988 Patent Application No. 028562 2 Name of the invention Method for manufacturing semiconductor devices 3 Amendment Relationship with the case involving the person who filed the patent application Office (105) 1-7-12 Toranomon, Minato-ku, Tokyo
No. 4 agent

Claims (1)

[Claims] A compound semiconductor substrate on which an ion-implanted layer is formed has a function of preventing group V elements constituting the substrate from leaving the substrate, and has an etching rate different from that of the substrate. A film is laminated, a polycrystalline compound layer of the element constituting the substrate is laminated on the film, and then the ion-implanted layer is activated in an atmosphere under pressure of the group III element constituting the substrate. A method for manufacturing a semiconductor device, characterized by performing annealing.