JPH03217019A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH03217019A JPH03217019A JP1328990A JP1328990A JPH03217019A JP H03217019 A JPH03217019 A JP H03217019A JP 1328990 A JP1328990 A JP 1328990A JP 1328990 A JP1328990 A JP 1328990A JP H03217019 A JPH03217019 A JP H03217019A
- Authority
- JP
- Japan
- Prior art keywords
- gas atmosphere
- oxide film
- substrate
- semiconductor substrate
- damaged
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 239000012298 atmosphere Substances 0.000 claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 17
- 238000005468 ion implantation Methods 0.000 claims abstract description 12
- 238000009832 plasma treatment Methods 0.000 claims abstract description 9
- 230000001590 oxidative effect Effects 0.000 claims abstract description 8
- 238000010438 heat treatment Methods 0.000 claims abstract description 6
- 239000007789 gas Substances 0.000 claims description 9
- 239000011261 inert gas Substances 0.000 claims description 5
- 230000007547 defect Effects 0.000 abstract description 17
- 229910052710 silicon Inorganic materials 0.000 abstract description 13
- 239000010703 silicon Substances 0.000 abstract description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 11
- 230000003647 oxidation Effects 0.000 abstract description 8
- 238000007254 oxidation reaction Methods 0.000 abstract description 8
- 150000002500 ions Chemical class 0.000 abstract description 6
- 230000006866 deterioration Effects 0.000 abstract description 4
- 229910052796 boron Inorganic materials 0.000 abstract description 3
- -1 boron ions Chemical class 0.000 abstract description 3
- 238000000137 annealing Methods 0.000 abstract description 2
- 239000012299 nitrogen atmosphere Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 14
- 239000013078 crystal Substances 0.000 description 7
- 238000009792 diffusion process Methods 0.000 description 5
- 239000012535 impurity Substances 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 150000003376 silicon Chemical class 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000004220 aggregation Methods 0.000 description 2
- 230000002776 aggregation Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- MGWGWNFMUOTEHG-UHFFFAOYSA-N 4-(3,5-dimethylphenyl)-1,3-thiazol-2-amine Chemical compound CC1=CC(C)=CC(C=2N=C(N)SC=2)=C1 MGWGWNFMUOTEHG-UHFFFAOYSA-N 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 239000003570 air Substances 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- JCXJVPUVTGWSNB-UHFFFAOYSA-N nitrogen dioxide Inorganic materials O=[N]=O JCXJVPUVTGWSNB-UHFFFAOYSA-N 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Landscapes
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Abstract
Description
【発明の詳細な説明】 (イ)産業上の利用分野 この発明は、半導体装置の製造方法に関する。[Detailed description of the invention] (b) Industrial application fields The present invention relates to a method for manufacturing a semiconductor device.
さらに詳しくは、酸化膜形成工程の改良に関する。More specifically, the present invention relates to improvements in the oxide film forming process.
(口)従来の技術
従来の半導体装置は、第2図(A)に示すようにシリコ
ン基板11の上にSiOy膜l2とSiN膜とを順に形
成し、ロコス法による酸化膜(素子分離領域)の形成を
意図する領域のSiN膜をエッチングし、次に第2図(
B)に示すように、この領域に素子分離領域下部のPN
反転を防止(チャネルストッパー)するために不純物イ
オンI4を照射して半導体中にイオン注入し(この結果
、半導体基板中に損傷層l5が形成される)、この後に
高温、長時間の酸化処理を行って、第2図(C)に示す
ように酸化膜(素子分離領域)+6を形成して作製して
いる。ただし、17はチャネルストッパー拡散層、l8
は転位部、19はOSF (酸化性雰囲気で誘導される
積層欠陥)である。(Example) Conventional technology In a conventional semiconductor device, a SiOy film 12 and a SiN film are sequentially formed on a silicon substrate 11 as shown in FIG. The SiN film is etched in the area where it is intended to be formed, and then the area shown in Fig. 2 (
As shown in B), there is a PN under the element isolation region in this region.
In order to prevent inversion (channel stopper), impurity ions I4 are irradiated and implanted into the semiconductor (as a result, a damaged layer I5 is formed in the semiconductor substrate), and then a high temperature and long oxidation treatment is performed. Then, an oxide film (element isolation region) +6 was formed as shown in FIG. 2(C). However, 17 is a channel stopper diffusion layer, l8
is a dislocation portion, and 19 is an OSF (stacking fault induced in an oxidizing atmosphere).
(ハ)発明が解決しようとする課題
上記従来の半導体装置の製造方法は、微細化がすすむに
つれ、チャネルストッパーの2次元拡散による半導体基
板表面の不純物濃度の低下が無視できなくなり、必然的
にチャネルストッパーの不純物注入量を増加させること
になり、この注入量がある量を越えると、酸化工程にお
いて半導体基板表面に欠陥を発生させることになる。半
導体基板の表面欠陥中、特に転位は、半導体基板中で運
動、増殖、成長をくり返し、一度形成されると、除去す
ることは困難となり、デバイス特性に対して非常に大き
な影響を与えデバイス特性を低下さ仕るという問題があ
る。(c) Problems to be Solved by the Invention In the above-mentioned conventional method for manufacturing semiconductor devices, as miniaturization progresses, the reduction in impurity concentration on the semiconductor substrate surface due to the two-dimensional diffusion of the channel stopper cannot be ignored, and the channel This increases the amount of impurity implanted into the stopper, and if this amount exceeds a certain amount, defects will occur on the surface of the semiconductor substrate during the oxidation process. Among the surface defects of semiconductor substrates, dislocations in particular repeatedly move, multiply, and grow in the semiconductor substrate, and once they are formed, they are difficult to remove and have a very large impact on device characteristics. There is a problem of deterioration.
この発明は、上記問題を解決するためになされた乙ので
あって、半導体基板の酸化工程において、半導体基板の
表面欠陥(結晶欠陥)の発生を抑えることができ、特性
の低下がなく信頼性に優れた半導体装置を製造すること
ができる半導体装置の製造方法を提供しようとするもの
である。This invention was made to solve the above problem, and is capable of suppressing the occurrence of surface defects (crystal defects) on the semiconductor substrate during the oxidation process of the semiconductor substrate, thereby improving reliability without deteriorating the characteristics. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can manufacture an excellent semiconductor device.
(二)課題を解決するための手段
この発明者は、イオン注入又はプラズマ処理によって加
工された半導体基板に、表面欠陥(結晶欠陥)を発生さ
せることなく、熱酸化による酸化膜を形成する方法につ
いて鋭意研究を行ったところ、イオン注入又はプラズマ
処理によって加工された半導体基板の表面及び内部に、
例えばリコイルSt(シリコン結晶格子からずれて配置
されたシリコン原子)、空孔点等の点欠陥の集合体とし
ての損傷層が形成されるという事実、この損傷層を有す
るシリコン基板を減圧下又は不活性ガス雰囲気下で加熱
すると、この損傷層がある程度回復されるという事実、
及びこの損傷層がある程度回3
復された基坂を酸化性ガス雰囲気下で加熱してもOSF
、転位等の欠陥が誘導されないという事実を見出してこ
の発明に至った。(2) Means for Solving the Problem The inventor has proposed a method for forming an oxide film by thermal oxidation on a semiconductor substrate processed by ion implantation or plasma processing without generating surface defects (crystal defects). After extensive research, we found that on the surface and inside of semiconductor substrates processed by ion implantation or plasma processing,
For example, the fact that a damaged layer is formed as an aggregation of point defects such as recoil St (silicon atoms arranged deviated from the silicon crystal lattice) and vacancies, The fact that this damaged layer can be recovered to some extent when heated under an active gas atmosphere;
And this damaged layer is recovered to some extent.Even if the restored base slope is heated in an oxidizing gas atmosphere, the OSF remains
This invention was achieved by discovering the fact that defects such as dislocations are not induced.
この発明によれば、イオン注入又はプラズマ処理によっ
て損傷を受けた半導体基板に、減圧下又は不活性ガス雰
囲気下で予備加熱を施し、続いて酸化性ガス雰囲気下で
加熱することによって酸化膜を形成することを特徴とす
る半導体装置の製造方法が提供される。According to this invention, an oxide film is formed by preheating a semiconductor substrate damaged by ion implantation or plasma treatment under reduced pressure or an inert gas atmosphere, and then heating it under an oxidizing gas atmosphere. A method for manufacturing a semiconductor device is provided.
上記予備加熱は、イオン注入又はプラズマ処理によって
受けた半導体基板の損傷を回復するためのものであって
、イオン注入又はプラズマ処理によって損傷を受けた半
導体基板を減圧下又は不活性ガス雰囲気下で、通常70
0〜1000℃に加熱して行うことができる。The above preheating is for recovering damage to the semiconductor substrate caused by ion implantation or plasma treatment, and the semiconductor substrate damaged by ion implantation or plasma treatment is heated under reduced pressure or in an inert gas atmosphere. Usually 70
It can be carried out by heating to 0 to 1000°C.
上記イオン注入又はプラズマ処理は、半導体基板を加工
処理するためのものであって、例えば半導体基板への不
純物イオンの注入、ドライエッチング等の加工処理を挙
げることができる。The above-mentioned ion implantation or plasma treatment is for processing a semiconductor substrate, and includes, for example, processing such as implantation of impurity ions into the semiconductor substrate and dry etching.
上記半導体基板の損傷(゛よ、イオン注入又はプラ4
ズマ処理によって半導体基板の表面及び内部に生じる結
晶の欠陥であって、例えばリコイルSt,空孔点等の点
欠陥の集合体を挙げることができる。Damage to the semiconductor substrate (i.e., crystal defects that occur on the surface and inside of the semiconductor substrate due to ion implantation or plasma treatment, such as recoil St, vacancy points, and other point defect aggregations) can.
上記減圧下は、通常1〜10Torr以下を用いること
ができる。The above-mentioned reduced pressure can be generally 1 to 10 Torr or less.
上記不活性ガス雰囲気は、例えば窒素、ガス、アルゴン
ガス等の雰囲気を用いることができる。The inert gas atmosphere may be, for example, nitrogen, gas, argon gas, or the like.
この発明においては、上記半導体基板に、この後に酸化
性ガス雰囲気下で加熱することによって酸化膜を形成す
る。In this invention, an oxide film is formed on the semiconductor substrate by subsequently heating it in an oxidizing gas atmosphere.
上記酸化性ガス雰囲気は、例えば、酸素ガス、空気、二
酸化窒素ガス等の雰囲気を用いることができる。上記加
熱は、通常800〜1200℃で行うことができる。The oxidizing gas atmosphere may be, for example, oxygen gas, air, nitrogen dioxide gas, or the like. The above heating can be normally performed at 800 to 1200°C.
上記酸化膜は、例えばロコス法による素子分離領域形成
用酸化膜、ゲート酸化膜等が挙げられる。Examples of the oxide film include an oxide film for forming an element isolation region formed by the Locos method, a gate oxide film, and the like.
また、この酸化膜の形成は、上記予備加熱に続いて同一
ンーケンスで行うことにより工程を短縮することができ
る。Further, the process can be shortened by forming the oxide film in the same sequence following the preheating described above.
(ホ)作用
減圧下又は不活性ガス雰囲気下の予備加熱が、イオン注
入又はプラズマ処理で受けた半導体基板の損傷を回復さ
せ、その後の酸化膜形成工程におけるOSF、転位等の
結晶欠陥の発生を防ぐ。(e) Effect Preheating under reduced pressure or an inert gas atmosphere recovers damage to the semiconductor substrate caused by ion implantation or plasma treatment, and prevents the occurrence of crystal defects such as OSFs and dislocations in the subsequent oxide film formation process. prevent.
(へ)実施例 この発明の実施例を図面を用いて説明する。(f) Example Embodiments of the invention will be described with reference to the drawings.
まず、第1図(A)に示すように、シリコン基板1の上
に熱酸化法によって膜厚600人のSins膜2を形成
し、この上にCVD法によって膜厚2500人のSiN
膜を積層する。次にロコス法による酸化膜(素子分離領
域)の形成を意図する領域のSiN膜3及びSiOz膜
2の表層を除去する。First, as shown in FIG. 1(A), a 600-layer thick SiS film 2 is formed on a silicon substrate 1 by a thermal oxidation method, and then a 2500-layer thick SiN film 2 is formed on this by a CVD method.
Stack the membranes. Next, the surface layers of the SiN film 3 and the SiOz film 2 in the region where an oxide film (element isolation region) is intended to be formed by the LOCOS method are removed.
次に、第I図(B)に示すようにボロンイオン4を照射
してシリコン基板l中にイオン注入を行う。Next, as shown in FIG. 1(B), boron ions 4 are irradiated to implant ions into the silicon substrate l.
この時、注入イオンの導入に伴い、シリコン基板l中に
リコイルSt,空孔点などの点欠陥の集合体としてのダ
メージ層5が形成される。At this time, as the implanted ions are introduced, a damaged layer 5 is formed in the silicon substrate l as a collection of point defects such as recoil St and vacancy points.
次に、このシリコン基板をN,雰囲気下、拡散炉によっ
て900℃で60分間予備アニール処理を行う。この結
果損傷層5は、ある程度回復され損償回復層6に変換さ
れる。Next, this silicon substrate is subjected to preliminary annealing treatment at 900° C. for 60 minutes in a diffusion furnace in an N atmosphere. As a result, the damaged layer 5 is recovered to some extent and converted into a loss recovery layer 6.
次に、このシリコン基板に1100℃で100分間口コ
ス法による酸化処理を施し、第1図(D)に示すように
膜厚9000.tの酸化膜8を形成する。なお7はチャ
ネルストッパー拡散層であり、酸化膜8の下部に結晶欠
陥は認められなかった。Next, this silicon substrate was subjected to an oxidation treatment using a coating method at 1100° C. for 100 minutes, resulting in a film thickness of 9000° C. as shown in FIG. 1(D). An oxide film 8 of t is formed. Note that 7 is a channel stopper diffusion layer, and no crystal defects were observed under the oxide film 8.
この後に、このシリコン基板lの上に素子を形成し、半
導体装置を作製する。After this, elements are formed on this silicon substrate l to produce a semiconductor device.
得られた半導体装置は、前記予備加熱処理を行わないで
この他はこの実施例と同様にして作製した半導体装置が
接合リーク不良を起こしたのに比べ、特性の低下がなく
信頼性に優れていた。The obtained semiconductor device had no deterioration in characteristics and was superior in reliability, compared to a semiconductor device manufactured in the same manner as in this example without performing the preheating treatment, which had a junction leak defect. Ta.
(ト)発明の効果
この発明によれば、イオン注入又はプラズマ処理によっ
て発生した半導体基板表面の欠陥を除去し、この後に行
う酸化工程での結晶欠陥の発生を抑えることができ特性
の低下がなく信頼性に優れた半導体装置を製造すること
ができる半導体装置の製造方法を樟供することができる
。(G) Effects of the Invention According to this invention, defects on the surface of a semiconductor substrate caused by ion implantation or plasma treatment can be removed, and the generation of crystal defects in the subsequent oxidation process can be suppressed, without deterioration of characteristics. A method for manufacturing a semiconductor device that can manufacture a semiconductor device with excellent reliability can be provided.
7
第1図はこの発明の実施例で作製した半導体装置の製造
工程説明図、第2図は従来の半導体装置の製造工程説明
図である。
l・・・・・シリコン基板、2・・・・・・SiOz膜
、3・・・・・・SiN膜、4・・・・・ボロンイオン
、5・・・・・・損傷層、6・・・・・・損傷回復層、
7・・・・・チャネルストッパーの拡散層、8・・・・
・・ロコス法による酸化膜。
一8ー
μ)7. FIG. 1 is an explanatory diagram of the manufacturing process of a semiconductor device manufactured in an embodiment of the present invention, and FIG. 2 is an explanatory diagram of the manufacturing process of a conventional semiconductor device. 1...Silicon substrate, 2...SiOz film, 3...SiN film, 4...Boron ion, 5...Damaged layer, 6... ...damage recovery layer,
7... Diffusion layer of channel stopper, 8...
...Oxide film by Locos method. 18-μ)
Claims (1)
半導体基板に、減圧下又は不活性ガス雰囲気下で予備加
熱を施し、続いて酸化性ガス雰囲気下で加熱することに
よって酸化膜を形成することを特徴とする半導体装置の
製造方法。1. An oxide film is formed by preheating a semiconductor substrate damaged by ion implantation or plasma treatment under reduced pressure or an inert gas atmosphere, and then heating it under an oxidizing gas atmosphere. A method for manufacturing a semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1328990A JPH03217019A (en) | 1990-01-22 | 1990-01-22 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1328990A JPH03217019A (en) | 1990-01-22 | 1990-01-22 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03217019A true JPH03217019A (en) | 1991-09-24 |
Family
ID=11829041
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1328990A Pending JPH03217019A (en) | 1990-01-22 | 1990-01-22 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03217019A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6268298B1 (en) | 1998-03-10 | 2001-07-31 | Denso Corporation | Method of manufacturing semiconductor device |
-
1990
- 1990-01-22 JP JP1328990A patent/JPH03217019A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6268298B1 (en) | 1998-03-10 | 2001-07-31 | Denso Corporation | Method of manufacturing semiconductor device |
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