JPH06216137A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To enhance the capturing effect of impurities, which give adverse effects on electric characteristics in the manufacturing process of a semiconductor device. CONSTITUTION:As a layer for capturing impurities such as heavy metal in a silicon substrate 1, a layer, which enhances the effect for capturing only a specific element, is formed by diffusing the element, which is to become the stable bonded state at normal temperature, in addition to a defect layer and an oxygen depositing layer on the rear surface. At the same time when polycrystalline silicon is grown on the rear surface of the silicon substrate 1, e.g. a boron-doped polycrystalline silicon film 2, wherein impurities such as boron having the iron capturing effect are diffused, is formed. Then, an integrated circuit is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its manufacturing method.

[0002]

2. Description of the Related Art A semiconductor device is manufactured by repeating various kinds of manufacturing processes. At this time, since the characteristics of the semiconductor element are adversely affected from the gas or chemical solution used for manufacturing, particularly heavy metals such as iron (Fe) and copper (Cu) adhere and diffuse into the semiconductor substrate,
It is well known that device characteristics are deteriorated, resulting in a decrease in manufacturing yield and poor reliability.

In a conventional method of manufacturing a semiconductor device, a method of trapping an impurity element that deteriorates the element characteristics so as not to adversely affect the element characteristics is a process of forming a defect layer on the back surface of a semiconductor substrate in advance. Method for capturing impurities (E
G method). Further, there is a method (IG method) of forming a layer having an effect of trapping inside the semiconductor substrate. Conventional EG
The method will be described with reference to FIG.

As a method of capturing an impurity element such as heavy metal, the element isolation diffusion layer 13 and the element isolation film 14 are formed with the defect layer 12 formed on the back surface of the semiconductor substrate 11, and the gate oxide film 15 and the gate electrode 16 are formed. There is a method of manufacturing a semiconductor device having a source / drain diffusion layer 17. As a method of forming the defect layer 12, there is a method of inducing crystal defects by applying quartz particles from the back surface (backside damage method). Heavy metal is captured in the defective portion during the diffusion heat treatment.

Further, a method of forming a polycrystalline silicon film on the back surface by a vapor phase epitaxy (CVD) method and capturing a heavy metal at a crystal grain boundary of the polycrystalline silicon (polyback sealing method)
There is. The crystal grain boundary of polycrystalline silicon is a kind of crystal defect because the arrangement of silicon atoms is deviated. Polycrystalline silicon means that when the semiconductor substrate is single crystal silicon,
Since a large number of crystal grain boundaries are present, a large number of crystal defects are included. Therefore, backside damage (B
The effect equal to or higher than that of the SD method can be obtained.

Next, the conventional IG method will be described with reference to FIG. As a method for capturing an impurity element such as a heavy metal, the element isolation diffusion layer 13 and the element isolation film 14 are formed in a state where the oxygen precipitation defect layer 22 is formed inside the semiconductor substrate 11, and the gate oxide film 15 and the gate electrode 16 are formed. There is a method of manufacturing a semiconductor device having a source / drain diffusion layer 17.

Single crystal silicon pulled up by the Czochralski (CZ) method melts a silicon block in a quartz crucible and grows a single crystal while rotating, so that the quartz crucible melts and a large amount of oxygen is mixed. There is. By subjecting this mixed oxygen to a wafer-shaped heat treatment step,
This is a method of forming a defect layer 22 of oxygen precipitation by depositing inside the substrate.

The present method of capturing impurities is a method of manufacturing a semiconductor device using the EG method and the IG method at the same time,
A method of precipitating a part of oxygen in a silicon single crystal by CZ method inside a substrate is used in a manufacturing process of a semiconductor device. However, in the conventional impurity trapping method using the IG method or the EG method, an element such as copper (Cu) or nickel (Ni) that is trapped by crystal defects and silicified into a stable state during the heat treatment step, There are elements such as iron (Fe) that cannot be captured by defects.

[0009]

Then, when the energetically stable state of each impurity element was investigated, it was clarified that it was bound to a specific element to be in the energetically stable state. In the process of manufacturing a semiconductor device, there is an oxidation process in the process of forming a pattern and forming a diffusion layer,
The oxidation process and the oxide film removal process are repeated. Generally, the oxide film removal step is performed in a chemical solution, so that the oxide film on the back surface is also removed.

In the thermal oxidation process, the oxidation rate is high in the region where the crystal defects are present, and the crystal defects are gradually reduced by the oxidation. This means that the damage layer formed by the EG method has a reduced amount of damage due to repeated thermal oxidation and removal of the oxide film, and thus has a reduced ability to capture an impurity element. Depending on the number of processes and the amount of oxidation, the trapping effect may not be maintained until the end of the process.

On the other hand, when oxygen precipitates are increased in the semiconductor substrate 11 by the IG method, strain due to volume expansion due to the precipitates occurs and leak current due to crystal strain increases. Furthermore, when oxygen precipitation is increased, it becomes difficult to control the defect-free region (DZ) width without oxygen precipitation, and oxygen precipitates adversely affect the device characteristics. Further, some of the impurity elements such as heavy metals include elements such as Fe that cannot be stably captured in the defect or precipitation portion, which adversely affects the electrical characteristics of the semiconductor device.

[0012]

A semiconductor device according to claim 1 comprises a semiconductor substrate, an integrated circuit formed on the semiconductor substrate, and an impurity element trapping layer formed on the back surface of the semiconductor substrate. The element trapping layer is another impurity layer that is in a stable bonded state at room temperature with an impurity element that adversely affects the characteristics of the integrated circuit.

According to another aspect of the semiconductor device of the present invention, a semiconductor substrate, an integrated circuit formed on the semiconductor substrate, a polycrystalline layer formed on the back surface of the semiconductor substrate, and at least one of the semiconductor substrate and the polycrystalline layer. The impurity element trapping layer is formed by diffusing the element, and the impurity element trapping layer is an impurity diffusion layer for trapping only an element that cannot be trapped by a crystal grain boundary of the polycrystalline film or a crystal defect layer.

A method of manufacturing a semiconductor device according to claim 3 is
Another impurity layer that is in a stable bonding state with an impurity element that adversely affects the characteristics of the integrated circuit at room temperature is formed by injecting accelerated particles from the back surface of the semiconductor substrate. The method for manufacturing a semiconductor device according to claim 4, wherein an impurity diffusion layer for capturing only an element that cannot be captured by a crystal grain boundary of the polycrystalline layer or a crystal defect layer is provided in at least one of the semiconductor substrate and the polycrystalline layer. It is characterized in that it is formed by diffusion.

[0015]

According to the present invention, by forming an impurity diffusion layer on the back surface of a semiconductor substrate, which is in a stable bonding state with an impurity element that adversely affects the characteristics of an integrated circuit, a defect layer or a precipitate inside the substrate can be formed. Impurities that could not be captured can be captured, and all impurities that adversely affect the electrical characteristics of the semiconductor device can be captured.

Further, when the impurity diffusion layer for capturing impurities is formed, the method of implanting particles accelerated by ion implantation can be used to uniformly form the impurity trap layer on the back surface of the semiconductor substrate. . Further, by forming a polycrystalline film on the back surface of the semiconductor substrate and diffusing and forming an impurity for capturing only an element that cannot be captured by a crystal grain boundary of the polycrystalline film or a crystal defect layer, an element that can be captured by a crystal defect. It is possible to capture two types of elements, which are elements that cannot be captured by crystal defects.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings. 1A to 1D are cross-sectional views in order of the steps of a method for manufacturing a semiconductor device according to a first embodiment of the present invention. As shown in FIG. 1A, the back surface of the silicon substrate 1 is subjected to a vapor phase growth method (CVD method) by using, for example, a mixed gas of silane gas and diborane gas for about 650.
A boron-doped polycrystalline silicon film 2 having a boron concentration of about 1.0 wt% is formed at a temperature of about 1.5 .mu.m. This thickness is set so that the boron-doped polycrystalline silicon film 2 remains to some extent even after the oxidation process and the oxide film removal process in the manufacturing process of this semiconductor device.

At this time, the polycrystalline silicon film 2 is simultaneously doped.
Bored boron is stable at room temperature as it combines with Fe.
Is an element for capturing Fe by becoming a state.
It Cu, Ni, etc. are contained in the grain boundaries of the polycrystalline silicon.
It has the effect of capturing elements. Furthermore, as shown in FIG.
As a protective oxide film, a thermal oxide film of about 20 nm is formed.
After that, the silicon nitride film is removed to prevent oxidation by the local oxidation method.
Grow. Furthermore, in the lithography process, pattern shape
After being created, for example CF_Four + O₂ (10%) mixed gas
A silicon nitride film by a reactive ion etching method using
Remove. Moreover, for example, boron is added by the ion implantation method.
Doping amount 2 × 10 at about 50 keV ¹³cm^-2Inject with
Heat treatment in a nitrogen atmosphere at about 900 ° C for 30 minutes
Thus, the separation diffusion layer 3 is formed. In addition, the separation diffusion layer 3
Approximately 700 nm of LOCOS4 is formed on the
Make it longer. After that, the silicon nitride used in the formation of LOCOS4
Phosphoric acid is used for the base film, and diluted hydrofluoric acid solution is used for the protective oxide film.
Are removed respectively.

At this time, the boron-doped polycrystalline silicon film 2 formed on the back surface is also oxidized and removed. The boron element diffused in the boron-doped polycrystalline silicon film 2 is
When COS4 is formed, since it is slowly oxidized at a high temperature of about 1000 ° C., it is diffused from the back surface side to the silicon substrate side without being taken into the oxide film. Furthermore, FIG.
As shown in (c), the gate oxide film 5 is formed to a thickness of about 40 nm in a dry oxygen atmosphere at about 1000.degree. Furthermore, C
A polysilicon film is formed by a VD method using, for example, silane gas. Next, in order to reduce the resistance of the polycrystalline silicon film, for example, POCl ₃ gas is used to thermally diffuse phosphorus at a high temperature of about 900 ° C. to reduce the resistance to about 10Ω and form the gate electrode 6. Furthermore, after patterning the resist in the lithography process, reactive ion etching is performed using a mixed gas with, for example, HBr to form a MOS.
Gate oxide film 5 and gate electrode 6 as a p-type transistor
To form.

At this time, before patterning the gate oxide film 5 and the gate electrode 6 of the MOS transistor, the polysilicon film on the back surface and the oxide film on the back surface formed when the gate electrode 6 is formed are hydrofluoric acid. And the nitric acid-based solution to remove the polysilicon film, and the diluted hydrofluoric acid solution to remove the oxide film. Also in this case, the boron element diffused in the boron-doped polycrystalline silicon film 2 is not taken into the oxide film because the thermal oxide film is slowly oxidized at a high temperature of about 1000 ° C. Therefore, the boron concentration in the boron-doped polycrystalline silicon film 2 does not decrease significantly.

Further, as shown in FIG. 1D, for example, by using the pattern of the gate electrode 6 and the gate oxide film 7 as a mask, for example, arsenic ions are ion-implanted at an acceleration energy of about 40 keV and a doping amount of about 4 × 10 ^14. Inject cm ^-2 . Further, heat treatment is performed at about 900 ° C. for 30 minutes in a nitrogen atmosphere to form the source / drain diffusion layer 7.

FIG. 2 is a cross-sectional view in order of the steps of a method for manufacturing a semiconductor device according to the second embodiment of the present invention. First, FIG. 2 (a)
As shown in FIG.
VD method), for example, using silane gas at about 650 ° C.
Then, a polycrystalline silicon film 8 is formed with a thickness of about 1.5 μm. This thickness is set so that the polycrystalline silicon film 8 remains to some extent even after the oxidation process and the oxide film removal process in the manufacturing process of this semiconductor device.

Next, as shown in FIG. 2B, boron ions 9 are implanted into the polycrystalline silicon film 8 formed on the back surface by an ion implantation method at an acceleration energy of about 100 keV and a doping amount of about 2 × 10 ¹⁴ cm ^-2 . By implanting, a boron-diffused polycrystalline silicon film 10 is formed. The doping amount of the boron ions 9 should be about 100 times or more the amount of Fe in consideration of the outward diffusion in the thermal process and the amount of Fe considered to diffuse during the manufacturing process of the semiconductor device. Conceivable.

At this time, the polycrystalline silicon film 8 on the back surface is
The pinged boron ion 9 combines with Fe at room temperature and becomes stable.
An element for capturing Fe when it enters a certain state
Is. At the crystal grain boundaries of the polycrystalline silicon film 9, Cu, N
It has an effect of capturing an element such as i. Furthermore, FIG.
As shown in (c), a thermal oxide film is used as a protective oxide film in about 2
After forming 0 nm, to prevent oxidation by the local oxidation method
Growing a silicon nitride film. Furthermore, lithography process
After patterning with, for example, CF_Four + O₂ (10
%) By a reactive ion etching method using a mixed gas of
The silicon nitride film is removed. Also, by the ion implantation method,
For example, the doping amount of boron is about 50 keV and the doping amount is 2 × 10. ¹³
cm^-2And heat it in a nitrogen atmosphere at 900 ° C for 30 minutes.
The separation diffusion layer 3 is formed by processing. Moreover,
About 1 nm of LOCOS 4 of about 700 nm is formed on the separation diffusion layer 3.
Grow at 000 ° C. After that, in the formation of LOCOS4
The silicon nitride film used is phosphoric acid, and the protective oxide film is diluted.
Each is removed using a hydrofluoric acid solution.

At this time, the boron-diffused polycrystalline silicon film 10 formed on the back surface is also oxidized and removed. The boron element diffused in the boron-diffused polycrystalline silicon film 10 is
When COS4 is formed, since it is slowly oxidized at a high temperature of about 1000 ° C., it is diffused from the back surface side to the silicon substrate side without being taken into the oxide film. Furthermore, FIG.
As shown in (d), the gate oxide film 5 is formed to a thickness of about 40 nm in a dry oxygen atmosphere at about 1000.degree. Furthermore, C
A polysilicon film is formed by a VD method using, for example, silane gas. Next, in order to reduce the resistance of the polycrystalline silicon film, for example, POCl ₃ gas is used to thermally diffuse phosphorus at a high temperature of about 900 ° C. to reduce the resistance to about 10Ω and form the gate electrode 6. Furthermore, after patterning the resist in the lithography process, reactive ion etching is performed using a mixed gas with, for example, HBr to form a MOS.
Gate oxide film 5 and gate electrode 6 as a p-type transistor
To form.

At this time, before patterning the gate oxide film 5 and the gate electrode 6 of the MOS transistor, the polysilicon film on the back surface and the oxide film on the back surface formed when the gate electrode 6 is formed are hydrofluoric acid. This is performed after the polysilicon film is removed with a nitric acid-based solution and the oxide film is removed with a dilute hydrofluoric acid solution. Also in this case, the boron element diffused in the boron-diffused polycrystalline silicon film 10 is not taken into the oxide film because the thermal oxide film is slowly oxidized at a high temperature of about 1000 ° C. Therefore, the boron concentration in the boron-diffused polycrystalline silicon film 10 does not decrease significantly.

After that, using the pattern of the gate electrode 6 and the gate oxide film 5 as a mask, for example, arsenic ions are implanted by an ion implantation method at an acceleration energy of about 40 keV and a doping amount of about 4 × 10 ¹⁴ cm ^-2 . Furthermore, heat treatment is performed at about 900 ° C for 30 minutes in a nitrogen atmosphere,
The drain diffusion layer 7 is formed. Furthermore, FIG. 3 is a sectional view in order of the steps of a method for manufacturing a semiconductor device according to the third embodiment of the present invention. First, as shown in FIG. 3A, a boron ion 9 is implanted into the back surface of the silicon substrate 1 by an ion implantation method at an acceleration energy of, for example, 100 keV and a doping amount of about 2 × 10.
Implantation is performed at ¹⁴ cm ⁻² to form a boron diffusion layer 11. The doping amount of the boron ions 9 is considered to be diffused during outward diffusion in the thermal process and during the semiconductor device manufacturing process.
Considering the amount of e together, it is considered that the amount may be about 100 times or more the amount of Fe.

At this time, the state of the back surface may be a wafer without BSD as long as it is an IG method wafer in which an oxygen precipitation layer is formed inside the substrate. Further, if the wafer is not processed by the IG method, BSD is required. Boron ion 9 on the back
Is an element for capturing Fe by being bound to Fe at room temperature to be in a stable state. However, Cu,
Ni or the like will be captured in the damaged layer of the BSD if there is BSD, and will be captured in the defect layer due to oxygen precipitation inside the substrate formed by heat treatment during the process if there is no BSD.

Further, as shown in FIG. 3 (b), a protective acid
After forming a thermal oxide film of about 20 nm as an oxide film,
A silicon nitride film is grown to prevent oxidation by the chemical method. It
In addition, after patterning in the lithography process,
CF_Four + O₂ Reactivity with (10%) mixed gas
The silicon nitride film is removed by the ion etching method. Well
Also, by ion implantation, for example, about 50 keV of boron
Doping amount 2 × 10 ¹³cm^-2Injected at about 900 ℃
Separation and diffusion by heat treatment in nitrogen atmosphere for 30 minutes
Form layer 3. In addition, the separation diffusion layer 3 has about 700
nm LOCOS 4 is grown at about 1000 ° C. That
Later, phosphoric acid is used for the silicon nitride film used for forming LOCOS4.
Then, the protective oxide film is removed by using a diluted hydrofluoric acid solution.

At this time, the boron element in the boron diffusion layer 11 on the back surface is slowly oxidized at a high temperature of about 1000 ° C. when the LOCOS 4 is formed, so that it is diffused from the back surface side to the silicon substrate side without being taken into the oxide film. However, the boron concentration of the boron diffusion layer 11 does not become extremely low. Further, as shown in FIG.
About 40 nm is formed in a dry oxygen atmosphere at 000 ° C.
Further, a polysilicon film is formed by a CVD method using, for example, silane gas. Next, in order to reduce the resistance of the polycrystalline silicon film, for example, POCl ₃ gas is used to reduce the resistance to about 9%.
Phosphorus is thermally diffused at a high temperature of 00 ° C. to reduce the resistance to about 10Ω and the gate electrode 6 is formed. Furthermore, after patterning the resist in the lithography process, for example, H
Reactive ion etching is performed using a mixed gas with Br to form a gate oxide film 5 and a gate electrode 6 as a MOS transistor.

At this time, before patterning the gate oxide film 5 and the gate electrode 6 of the MOS transistor, the polysilicon film on the back surface and the oxide film on the back surface formed when the gate electrode 6 is formed are hydrofluoric acid. This is performed after the polysilicon film is removed with a nitric acid-based solution and the oxide film is removed with a dilute hydrofluoric acid solution. Also in this case, the boron element of the boron diffusion layer 11 is diffused from the back surface side to the silicon substrate side without being taken into the oxide film because the thermal oxide film is slowly oxidized at a high temperature of about 1000 ° C. The boron concentration in the layer 11 does not become extremely low.

Further, as shown in FIG. 3D, for example, by using the pattern of the gate electrode 6 and the gate oxide film 5 as a mask, for example, arsenic ions are ion-implanted at an acceleration energy of about 40 keV and a doping amount of about 4 × 10 ^14. Inject cm ^-2 . Further, heat treatment is performed at about 900 ° C. for 30 minutes in a nitrogen atmosphere to form the source / drain diffusion layer 7.

Further, the method of manufacturing the semiconductor device of the present invention has been described with reference to FIGS. 1, 2 and 3. However, when it is necessary to form an electrode on the back surface of the semiconductor device in operation, it is diffused on the back surface. If operation is inconvenient due to the presence of boron, it is removed by a mechanical cutting method or a chemical polishing method. The mechanical cutting or chemical polishing of the back surface of the silicon substrate 1 is also used when it is desired to simply reduce the thickness of the wafer.

[0034]

According to the method of the present invention, by diffusing an impurity capable of trapping the impurity separately from the defect layer formed on the back surface of the semiconductor substrate, all the electrical characteristics of the semiconductor device are adversely affected. Can capture impurities.
As a result, defects in the initial stage due to electrical leakage can be significantly reduced. Furthermore, since all the impurity elements such as heavy metals can be captured, it is possible to suppress the occurrence of defects due to the deterioration of the characteristics of the semiconductor device in the continuous operation state. Furthermore, since it is a method of enhancing the trapping effect by individual elements, it is only necessary to carry out the IG method and the EG method in appropriate amounts, so that the distortion of the wafer due to the enhancement of the trapping effect can be suppressed.

[Brief description of drawings]

FIG. 1 is a cross-sectional view in order of steps of a method for manufacturing a semiconductor device, for explaining a first embodiment of the present invention.

FIG. 2 is a cross-sectional view in order of the steps of a method for manufacturing a semiconductor device, for explaining the second embodiment of the present invention.

FIG. 3 is a step-by-step cross-sectional view of a method of manufacturing a semiconductor device for explaining a third embodiment of the present invention.

FIG. 4 is a diagram illustrating a conventional impurity trapping method for a semiconductor device.

FIG. 5 is a diagram illustrating a conventional impurity trapping method for a semiconductor device.

[Explanation of symbols]

 1 Silicon Substrate 2 Boron Doped Polycrystalline Silicon 3 Separation Diffusion Layer 4 LOCOS 5 Gate Oxide Film 6 Gate Electrode 7 Source / Drain Diffusion Layer 8 Polycrystalline Silicon Film 9 Boron Ion 10 Boron Diffused Polycrystalline Silicon Film

Claims (4)

[Claims] 1. A semiconductor substrate, an integrated circuit formed on the semiconductor substrate, and an impurity element trapping layer formed on the back surface of the semiconductor substrate, wherein the impurity element trapping layer has characteristics of the integrated circuit. A semiconductor device that is another impurity layer that is in a stable bonded state with an impurity element that has a bad influence at room temperature. 2. A semiconductor substrate, an integrated circuit formed on the semiconductor substrate, a polycrystalline layer formed on the back surface of the semiconductor substrate, and diffusion formed on at least one of the semiconductor substrate and the polycrystalline layer. A semiconductor device comprising an impurity element trapping layer, wherein the impurity element trapping layer is an impurity diffusion layer for trapping only an element that cannot be trapped by a crystal grain boundary or a crystal defect layer of the polycrystalline film. 3. The method for manufacturing a semiconductor device according to claim 1, wherein another impurity layer that is in a stable bonding state with an impurity element that adversely affects the characteristics of the integrated circuit at room temperature is accelerated from the back surface of the semiconductor substrate. A method for manufacturing a semiconductor device, comprising the steps of injecting the formed particles to form a semiconductor device. 4. The method for manufacturing a semiconductor device according to claim 2, wherein the impurity diffusion layer for capturing only an element that cannot be captured by a crystal grain boundary of the polycrystalline layer or a crystal defect layer is provided on the semiconductor substrate and the polycrystalline layer. A method of manufacturing a semiconductor device, which comprises forming diffusion on at least one of the layers.