JP2743451B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to recovery from damage due to ion implantation after ion implantation.

2. Description of the Related Art Conventionally, as a method for manufacturing a semiconductor device of this type, a method in which ion implantation is performed in a state where a silicon substrate is exposed, followed by annealing in an inert gas atmosphere (eg, nitrogen) containing several percent of oxygen. It has been known. There is also known a method of performing ion implantation through a silicon oxide film formed on a silicon substrate by, for example, a thermal oxidation process, and then performing annealing in an inert gas atmosphere containing no oxygen.

Problems to be Solved by the Invention As the size of semiconductor devices becomes smaller, for example, CM
In the case of a semiconductor device having an OS structure, the concentration of a well formed in a semiconductor substrate must be increased in order to increase latch-up resistance. Ion implanting boron ⁽¹¹ B ⁺⁾ in order to form a P-well, but the higher the dose of the boron implantation, the following problems may occur.

After performing ion implantation with the silicon substrate exposed, if annealing is performed at a high temperature (1000 ° C. or more) in an inert gas atmosphere containing no oxygen,
Since the surface of the silicon substrate is attacked and roughened by trace impurities contained in the inert gas, it is necessary to add oxygen. Here, when the dose amount of boron implantation is increased, the damage density due to ion implantation increases, and the silicon substrate is oxidized by oxygen in the atmosphere during the annealing process, so that oxidation-induced defects (hereinafter abbreviated as OSF) grow. Would. This OSF remains until the final step of the semiconductor device manufacturing process, captures contamination during the manufacturing process and forms impurity levels,
For example, it causes an increase in the reverse leakage current of the diffusion layer,
This leads to deterioration of the characteristics of the semiconductor device.

Further, when ion implantation is performed through a silicon oxide film, the silicon substrate is not roughened even if high-temperature annealing is performed in an inert atmosphere containing no oxygen because the silicon substrate surface is protected by the silicon oxide film. Therefore, by performing annealing after ion implantation in an inert atmosphere containing no oxygen, growth of OSF due to ion implantation damage can be suppressed. However, in this case, since the ions are implanted through the silicon oxide film, oxygen in the silicon oxide film is knocked on in the silicon substrate, and this is not recovered even in the annealing process, and remains as dislocation. These dislocations are also associated with contamination during the semiconductor device manufacturing process, causing deterioration in the characteristics of the semiconductor device.

The present invention has been made in view of the above-mentioned conventional circumstances, and accordingly, an object of the present invention is to provide a novel method of manufacturing a semiconductor device which can eliminate the above-mentioned drawbacks inherent in the conventional technology. It is in.

Differences from the Prior Art of the Invention In contrast to the conventional method of manufacturing a semiconductor device described above, the present invention performs ion implantation with the silicon substrate exposed,
Subsequently, by depositing polysilicon by the CVD method, OSF growth can be suppressed because the silicon substrate does not come into direct contact with oxygen in the subsequent high-temperature annealing step, and the silicon substrate is exposed during ion implantation. Therefore, there is a difference that oxygen is not knocked on into the silicon substrate.

Here, instead of depositing polysilicon by CVD, C
A method of depositing a silicon oxide film by the VD method is also conceivable, but OSF grows due to oxygen or the like used as a reaction gas when depositing the silicon oxide film. Therefore, polysilicon which becomes a non-oxidizing atmosphere during deposition is most suitable.

Means for Solving the Problems In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention comprises the steps of: performing ion implantation with a silicon substrate exposed; The method includes a step of depositing silicon and an annealing step.

If the annealing process is performed in an inert atmosphere that does not contain oxygen at all, the polysilicon surface will be roughened. First, the polysilicon substrate is not oxidized in an atmosphere containing oxygen, and the polysilicon is partially oxidized. Is changed to a silicon oxide film, and then annealing is performed in a completely inert atmosphere.

Next, preferred embodiments of the present invention will be described with reference to the drawings.

1 (a) and 1 (b) are cross-sectional views showing the steps of forming a P-well of a CMOS semiconductor device according to a first embodiment of the present invention in the order of steps.

Referring to FIGS. 1A to 1D, a silicon substrate 11 is shown.
A 500 nm silicon oxide film 12 is formed thereon by a thermal oxidation method. A photoresist 13 is applied on the silicon oxide film 12,
The silicon oxide film 12 in the P-well formation region is etched away by photolithography. Photoresist 13
A silicon oxide film 12, boron ions into the P-well forming region as a mask ⁽¹¹ B ⁺⁾ and an acceleration energy 100 KeV,
Ion implantation is performed at an implantation dose of 3 × 10 ¹³ cm ⁻² to form a P ⁺ region 14 (FIG. 1A).

Next, polysilicon 15 is accumulated to a thickness of 30 nm by a CVD method utilizing thermal decomposition of SiH ₄ (FIG. 1 (b)). A part of the surface of the polysilicon 15 is changed to a 20 nm polysilicon oxide film 16 by a thermal oxidation method, and then annealing is performed in an inert atmosphere to remove damage due to ion implantation in the P ⁺ region 14. In order to set the depth of the P well to a predetermined depth, P ⁺
The region 14 is diffused into the silicon substrate 11 (FIG. 1 (c)). At this time, if the annealing step is performed at a high temperature exceeding 1000 ° C., a small amount of impurities in an inert atmosphere
, The surface of the polysilicon 15 is roughened, so that the formation of the polysilicon oxide film 16 is necessary. However, if the annealing step is performed at a temperature of 1000 ° C. or less, the polysilicon oxide film 16 The annealing step may be performed without forming the layer.

When the P ⁺ region 14 has a predetermined depth, the polysilicon 15 and the silicon substrate 11 are thermally oxidized via the polysilicon oxide film 16 in an oxidizing atmosphere (FIG. 1 (d)).
By etching and removing the silicon oxide film 12 with hydrofluoric acid, a silicon substrate surface on which the polysilicon 15 does not remain can be obtained.

Through the above steps, the P-well region of the CMOS semiconductor device can be formed without leaving damage due to ion implantation in the silicon substrate 11.

2 (a) to 2 (e) are sectional views showing the steps of forming a buried layer of a bipolar transistor according to a second embodiment of the present invention in the order of steps.

Referring to FIGS. 2A to 2E, the silicon substrate 21
An N ⁺ buried layer 22 is formed thereon by photolithography using diffusion from arsenic or silica containing antimony. Subsequently, a 300 nm silicon oxide film 2 is formed by thermal oxidation.
3 is formed, a photoresist 24 is applied on the silicon oxide layer 23, and the silicon oxide film 23 in a region where the P ⁺ buried layer 25 is to be formed is removed by photolithography. Using the photoresist 24 and the silicon oxide film 23 as a mask, P ⁺
Boron ions are implanted into the region where the buried layer 25 is to be formed, for example, with an acceleration energy of 100 KeV and an implantation amount of 1 × 10 ¹⁴ cm ⁻² ,
A P ⁺ buried layer 25 is formed (FIG. 2A). Next, polysilicon 26 is deposited to a thickness of 30 nm by the CVD method (FIG. 2B). A portion of the surface of the polysilicon 26 is thermally oxidized to 20
After forming a polysilicon oxide film 27 of nm, annealing is performed in an inert atmosphere (FIG. 2C). At this time, when the annealing temperature is 1000 ° C. or lower as in the first embodiment, the step of forming the polysilicon oxide film can be omitted. Next, the polysilicon 26 is completely oxidized in an oxidizing atmosphere (FIG. 2D), and the polysilicon oxide film 27 and the silicon oxide film are completely removed with a solution containing hydrofluoric acid. At this time, the polysilicon 26 is
If a small amount remains on the top, abnormal growth may occur in the subsequent epitaxial silicon growth, or the crystal quality of the epitaxial layer may be deteriorated, greatly affecting the electrical characteristics of the semiconductor device. Need to be removed. Next, silicon is epitaxially grown on the silicon substrate to form an epitaxial layer.

Through the above steps, a buried layer of a bipolar transistor without damage due to ion implantation can be formed.

Although the example of the ion implantation step of boron ion ( ¹¹ B ⁺ ) has been described above, the present invention is applicable to the ion implantation of other ion species such as arsenic ion ( ⁷⁵ As ⁺ ) and phosphorus ion ( ³¹ P ⁺ ). It is valid.

In the first and second embodiments, the polysilicon is finally removed. However, in a step where there is no problem even if the polysilicon remains, for example, in a field forming step, a source / drain forming step of a MOS transistor, the polysilicon is removed. The step of removing silicon can be omitted.

Effects of the Invention As described above, according to the present invention, ion implantation is performed in a state where a silicon substrate is exposed, and then polysilicon is deposited by a CVD method, thereby suppressing OSF growth in a subsequent high-temperature annealing step. Thus, an effect is obtained that the deterioration of the electrical characteristics of the semiconductor device can be prevented because the OSF captures the contamination in the semiconductor device manufacturing process.

[Brief description of the drawings]

1 (a) to 1 (d) are cross-sectional views showing a first embodiment of the present invention in the order of steps, and FIGS. 2 (a) to 2 (e) are cross-sectional views showing a second embodiment of the present invention in the order of steps. FIG. 11,21… Silicon substrate, 12,23… Silicon oxide film, 13,24
... photoresist, 14 ... P ⁺ region, 15,26 ... polysilicon, 16,27 ... polysilicon oxide film, 22 ... N ⁺ buried layer, 25 ... P
⁺ Embedded layer, 28… Epitaxial layer

Claims (1)

(57) [Claims] In the step of forming an impurity diffusion layer in a silicon substrate by ion implantation, ion implantation is performed with the silicon substrate exposed, and then polysilicon is deposited on the silicon substrate by a CVD method. And a step of annealing the semiconductor device.