JPS60169850U - optical module - Google Patents
optical moduleInfo
- Publication number
- JPS60169850U JPS60169850U JP1984056693U JP5669384U JPS60169850U JP S60169850 U JPS60169850 U JP S60169850U JP 1984056693 U JP1984056693 U JP 1984056693U JP 5669384 U JP5669384 U JP 5669384U JP S60169850 U JPS60169850 U JP S60169850U
- Authority
- JP
- Japan
- Prior art keywords
- main surface
- ceramic substrate
- semiconductor element
- optical semiconductor
- upper lid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の光モジュールの一例を示す断面図、第2
図は本考案の一実施例を示す断面図、第3図から第5図
までは本考案の他の実施例を示す断面図である。
10・・・セラミック基板、11・・・光半導体素子、
12・・・電気回路素子、13・・・第1の上ぶた、1
6・・・第2の上ぶた、19・・・電気配線部。Figure 1 is a cross-sectional view showing an example of a conventional optical module;
The figure is a cross-sectional view showing one embodiment of the present invention, and FIGS. 3 to 5 are cross-sectional views showing other embodiments of the present invention. 10... Ceramic substrate, 11... Optical semiconductor element,
12... Electric circuit element, 13... First upper lid, 1
6... Second upper lid, 19... Electrical wiring section.
Claims (2)
を有するセラミック基板と、前記第1の主面上に設けら
れた光半導体素子と、前記第2の主面上に設けられた電
気回路素子と、前記光半導体素子を覆うように前記セラ
ミック基板に設けられた透光部を有する第1の上ぶたと
、前記電気回路素子を覆うように前記セラミック基板に
設けられた第2の上ぶたと、前記セラミック基板を介し
て前記光半導体素子と前記電気回路素子とを接続する電
気配線部とを備えたことを特徴とする光モジュール。(1) A ceramic substrate having a first main surface and a second main surface opposite to the first main surface, an optical semiconductor element provided on the first main surface, and an optical semiconductor element provided on the second main surface. a first upper lid having a light-transmitting part provided on the ceramic substrate so as to cover the optical semiconductor element; and a first upper lid provided on the ceramic substrate so as to cover the electric circuit element; An optical module comprising: a second upper lid; and an electrical wiring section that connects the optical semiconductor element and the electric circuit element via the ceramic substrate.
ラミックス基板は、第1及び第2のセラミック基板とこ
れらにはさまれている導電層とからなることを特徴とす
る実用新案登録請求の範囲第1項記載の光モジュール。(2) A utility model registration claim characterized in that the optical semiconductor element is a light receiving element, and the ceramic substrate is composed of first and second ceramic substrates and a conductive layer sandwiched therebetween. The optical module according to item 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984056693U JPS60169850U (en) | 1984-04-19 | 1984-04-19 | optical module |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984056693U JPS60169850U (en) | 1984-04-19 | 1984-04-19 | optical module |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60169850U true JPS60169850U (en) | 1985-11-11 |
Family
ID=30580534
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984056693U Pending JPS60169850U (en) | 1984-04-19 | 1984-04-19 | optical module |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60169850U (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61281559A (en) * | 1985-06-07 | 1986-12-11 | Nippon Kogaku Kk <Nikon> | Photodetector |
WO2010098277A1 (en) * | 2009-02-25 | 2010-09-02 | 住友電気工業株式会社 | Optical semiconductor device |
JP2019204890A (en) * | 2018-05-24 | 2019-11-28 | 日本ルメンタム株式会社 | Optical assembly |
-
1984
- 1984-04-19 JP JP1984056693U patent/JPS60169850U/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61281559A (en) * | 1985-06-07 | 1986-12-11 | Nippon Kogaku Kk <Nikon> | Photodetector |
WO2010098277A1 (en) * | 2009-02-25 | 2010-09-02 | 住友電気工業株式会社 | Optical semiconductor device |
JP2010199302A (en) * | 2009-02-25 | 2010-09-09 | Sumitomo Electric Ind Ltd | Optical semiconductor device |
JP2019204890A (en) * | 2018-05-24 | 2019-11-28 | 日本ルメンタム株式会社 | Optical assembly |
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