JPS60163457A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable the titled device which has attained the improvement in gate withstand voltage and in integration to be obtained with high yield by providing an element region whose bottom is a smooth inclined surface. CONSTITUTION:An insulation film 23 is formed on the semiconductor layer 22 of a substrate 21 produced by lamination of an Si semiconductor layer 21 on a sapphire substrate 20. The region except that immediately under the insulation film 23 is etched in such a manner that the semiconductor layer 21 remains on the sapphire substrate 20. An insulation film 24 is deposited on the remaining insulation film 23 and semiconductor layer 21. An element region 27 is obtained on the sapphire substrate 20 by removing the insulation films 23 and 24. Next, a thin gate oxide film 28 is formed on the surface of the element region 27. The bottom of the region 27 is a smooth inclined surface 26, and the improvement in gate withstand voltage and the titled device of high reliability can be obtained with high yield by uniform formation of the gate oxide film 28.

Description

[Detailed description of the invention] The present invention relates to a method for manufacturing a semiconductor device.

[Technical background of the invention]

Conventionally, a so-called SOS type semiconductor device in which predetermined elements are formed in a semiconductor layer on a sapphire substrate has been manufactured, for example, as follows. First, as shown in FIG. 1A, the surface of a semiconductor layer 2 made of silicon on a sapphire substrate 1 is coated with CVD (Cbetnic Al Vapor).
An insulating film 3 having a predetermined thickness is formed by a deposition method, and the insulating film 3 is etched so that a portion corresponding to a portion where an element region is to be formed remains. Next, the same figure (B)
As shown in FIG. 2, using the patterned insulating film 3 as a mask, anisotropic etching is performed using an etching solution made of KOH or the like so that an island-shaped element region 4 remains in the semiconductor layer 2.

Next, as shown in the figure (C), after removing the insulating film 3, thermal oxidation is performed to form an island-shaped element region 4 as shown in (■) in the figure.
A straight insulating film 5 is formed to cover the surface of the substrate. After that, channel ions are implanted into the device region 4, a gate electrode 6 is formed, a source/drain is formed, and a film 7 is formed.
, forming source/drain extraction electrodes, etc.
As shown in the figure, a semiconductor device 10 is obtained.

[Problems with background technology]

This method of manufacturing a semiconductor device has the following problems.

(2) As shown in FIG. 2, the peripheral surface of the element region 4 is an inclined surface 4aK over almost the entire area. For this reason, when forming the element region 4, an unnecessary area 8 increases under the element region 4 as the thickness of the element region 4 increases, resulting in a problem of lowering the degree of integration.

■ In order to solve this problem, the slope of the side surface of the element region 4 is eliminated and the side surface is made vertical, as shown in FIG. 3.
At the interface between the element region 4 and the sapphire substrate J, a dart insulating film 5 having a sufficient thickness cannot be formed. the result,
Lower the dirt resistance voltage of the element.

In order to solve all of the problems described in (1) and (2), there is a method of slanting the side surface of the element region 4 in an area necessary for oxidation so that a sufficiently thick gate insulating film 5 is formed at the bottom of the element region 4. . With such means, the thickness of the insulating film 5 cannot be made uniform, and moreover, extremely high shape accuracy is required in the formation of the element region 4, resulting in a problem of reduced yield. .

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device, which can produce a single semiconductor device with a high yield, and which has improved the breakdown voltage and degree of integration.

[Summary of the invention]

The present invention is a method for manufacturing a semiconductor device which can be obtained at a high gold yield by providing an element region with a smooth sloped bottom, thereby achieving improved gate breakdown voltage and degree of integration. .

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

First, as shown in FIG. 4(4), a substrate 22 is prepared, in which a semiconductor layer 21 made of silicon is laminated on a sapphire substrate 20, for example. K C on this substrate 220 and semiconductor layer 2
A υ insulating film 23 with a thickness of about 0.5 μm is formed by the VD method.

Next, an insulating film 23 is formed over the intended element region of the semiconductor layer 21.
The insulating film 23 is/or is turned so that it remains.

Next, after sequentially performing field ion implantation and heat treatment, wet etching is performed using the insulating film 23 as a mask, so that the edges of the element region to be formed have smooth curved edges.

Next, as shown in ψ) in the same figure, R
IE (Raactlve Ion Etching
), and the semiconductor layer 21 is etched so that the semiconductor layer 21 with a thickness of about 0.2 μm remains on the sapphire substrate 20 in the area other than the direct F of the insulating film 23. ), an insulating film 24 with a thickness of about 0.2 μm is formed on the remaining insulating film 23 and semiconductor layer 2 by the CVD method.
accumulate.

Next, as shown in FIG. Φ), the insulating film 24 is subjected to RIE so that the insulating film 24 remains on the side surface of the element region 25 formed directly under the first insulating film 23.

Next, as shown in the same figure (JD), the exposed semiconductor layer 2 is removed by isotropic etching using the insulating films 23 and 24 surrounding the element region 25 as a mask, and the lower end of the element region 25 is smoothed. The inclined surface 26 is made to have a suitable slope.

Next, as shown on the same side), the insulating films 23 and 24 are removed to obtain an element region 27 of a predetermined shape on the sapphire substrate 20.

Next, as shown in the same figure (@), thermal oxidation is performed on the surface of the element region 27 to form a thin gate oxide film 28. After that, channel ions are implanted into the element region 27, dirt electrodes are formed, sources and drains are formed, passivation films are spread, source and drain lead electrodes are formed, etc., and a semiconductor device that meets predetermined specifications is completed. get. - In the semiconductor device thus obtained, the element region 27
As shown in FIG. 5, the width (Δ') of the so-called wasted area 29 at the bottom of the element region 27 was 0.3 μm above 2Δ' when observed with a full-scanning electron microscope. I understand. In contrast, the element region 4 formed by the conventional method
As shown in FIG. 2, the width (Δ) of the wasted area 8 at the bottom was found to be 0.6 μm (2Δ). In other words, according to the method of the present invention, the wasted area 29, which hinders integration, can be reduced to about half that of the conventional method. As a result, the degree of integration can be significantly improved.

In addition, according to the method of the present invention, since the bottom of the element region 27 is a smooth sloped surface 26, the gate weakening film 28 having a predetermined thickness can be uniformly formed to increase the gate breakdown voltage. As shown in FIG. 9, highly reliable semiconductor devices can be obtained at a high yield.

〔Effect of the invention〕

As described above, according to the method of manufacturing a semiconductor device according to the present invention, a semiconductor device with improved gate breakdown voltage and degree of integration can be obtained at a high yield rate.

[Brief explanation of drawings]

1(4) to 1(E) are explanatory diagrams showing the conventional method for manufacturing a semiconductor device in the order of steps, FIGS. 2 and 3 are explanatory diagrams showing the drawbacks of the conventional method, and FIG. The same picture is
FIG. 5, which is an explanatory diagram showing the entire process steps of the method of the present invention, is a detailed explanatory diagram of the present invention. 20... Sapphire substrate, 21... Semiconductor j threat, 2
2... Substrate, 23.24... Insulating film, 25.27.
. . . Element region, 26 . . . Slanted surface, 28 . . . Kate oxide film, 29 .

Claims (1)

[Claims] A step of forming an insulating film with a predetermined number of turns on the surface of a semiconductor layer formed on an insulating substrate, and performing anisotropic etching using the insulating film as a mask, so that the semiconductor layer protrudes from directly below the insulating film. forming a new insulating film to cover the insulating film and the exposed surface of the semiconductor layer; and performing anisotropic etching on the new insulating film to form the thinned semiconductor layer. a step of exposing a portion of the intended element region directly overlapping the insulating film with the insulating film, and removing the atomized semiconductor layer by isotropic etching;
A method for manufacturing a semiconductor device, comprising the steps of: forming an inclined surface on a bottom peripheral surface of the intended element region; and removing the insulating film to obtain an element region on the insulating substrate.