JPS60153129A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the step coverage of an upper layer by removing residuals in a level difference part to finish said part with the desired angle by a method wherein an independent electrode in the periphery of a parallel flat electrodes is arranged and an independent A.C. power in applied to that electrode to control an incident angle of reactive ions into a substrate and to add the lateral etching effect. CONSTITUTION:When high-frequency power 1 is applied, a self-bias is generated in the periphery of a substrate by the upper and lower electrodes 2 and an electric field is produced in vertical direction. At the same time, an electric field in horizontal direction is produced by a horizontal electrode 9 and ions enters into a substrate obliquely. The lateral-direction components of the reactive ions 4 change in all times according to frequency of horizontal electric power. The intensity of reactive ions in horizontal direction can be controlled by control of frequency and electric power in horizontal direction. For example, if A.C. power proportional to coswt and sinwt is applied in X and Y-directions respectively, the uniform electric field which makes a round with a constant cycle 1/w in horizontal direction and thus the uniform etching is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device including a dry etching process.

Generally, in the manufacturing method of semiconductor devices, there is a process called etching to form a desired pattern on a semiconductor substrate.
There are two methods for this.

One is so-called wet etching, in which etching is carried out by a chemical reaction using a chemical solution, and the other is so-called dry etching, in which etching is carried out by a chemical or physical reaction in which the gas is dissociated into a plasma state by full gas discharge.

Wet etching is a method that has been widely used in the past, but because the etching is a chemical reaction (Q-), it is isotropic and requires a large side etch lid, making it unsuitable for microfabrication. On the other hand, dry etching has recently started to be used because it allows anisotropic etching, and is becoming indispensable in the manufacture of semiconductor devices that require fine processing. %
The dry etching process, in which a semiconductor substrate is placed between parallel plate electrodes and a high frequency is applied to the parallel plate electrodes to turn gas into plasma and etch it, has become mainstream in microfabrication.

This conventional method will be explained below based on the drawings.

FIG. 1 shows a conventional parallel plate electrode type dry etching apparatus. 1 is the high frequency power applied to the electrode, 2 is the electrode, and 3 is the semiconductor substrate. Although FIG. 1 shows a so-called anode coupling method in which the 'TIE electrode on which the substrate is set is all grounded, a cathode coupling method in which the counter electrode is grounded is also conceivable. When high frequency power 1 is applied to the device shown in FIG. 1, a self-bias is generated in the electrode, and reactive ions are incident perpendicularly onto the substrate as shown in FIG. As a result, the etching cross section becomes vertical as shown in FIG. 5, and etching without side etching can be realized.

However, this dry etching process also has various problems. One of the problems is that because the etching is anisotropic, etching remains 5 are generated at the stepped portions as shown in FIG. 4(a). This is because, as shown in Fig. 4(b), the film thickness of the object to be etched 6 apparently increases in the knitting direction at the step part, so in anisotropic etching (etching only in the vertical direction), a residue is left in that part. That is what it is.

This is because when the object to be etched is both wiring and gate material,
As shown in FIG. 4(e), there is a fear that the residue 1 may cause a short circuit between the wiring lines, resulting in the element itself becoming defective.

Therefore, various methods have been devised to completely solve this problem. For example, after dry etching, wet etching is performed for a short period of time to remove the residue at the stepped portion while leaving the resist, but these methods require more steps and are difficult to control. This is because step coverage at stepped portions is generally poor, so in the wet etching process, if the etching time is too long, breakage may occur in the case of wiring, etc.

Another disadvantage is that because the etching is anisotropic, the cross-sectional shape is vertical as shown in Figure 5, which may result in poor step covering of the upper layer, or the crank may enter. There is a risk of

The overall purpose of the present invention is to provide a method for manufacturing a semiconductor device that can remove residues at step portions, which are a drawback of the above-mentioned anisotropic etching, in a well-controlled manner without increasing the number of steps, and also improve the coverage of the upper layer. It is something.

The characteristic of the present invention is that a unique electrode is provided around the parallel plate electrode, and a parallel plate 1. By applying a unique alternating current power different from that of the electrode, fully controlling the angle of incidence of reactive ions onto the substrate, and adding a lateral etching effect, residues at the stepped portion can be removed and the etching shape can be adjusted to the desired shape. Finished at an angle,
A dry etching process is performed to improve the step coverage of the upper layer.

The principle of the present invention will be explained in detail below with reference to the drawings.

FIG. 6 is a front view of the dry etching apparatus used in the dry etching step included in the method of manufacturing a semiconductor device according to the present invention, and FIG. 7 is a plan view of the same as seen from above. AC box: Forces 7 and 8 have a frequency (lower frequency than υ3 frequency power) and phase that are unique to frequency power 1, and 9 is a horizontal electrode.

When high frequency power 1 is applied to the device shown in Fig. 6, the upper and lower electrodes 2
This causes a self-bias near the substrate and generates a vertical electric field, but at the same time water) V is 1 in one direction! An electric field is also generated in the horizontal direction by the pole 9, and ions are incident obliquely onto the substrate as shown in FIG.

Figure 8 is a diagram that captures a certain moment, and the reactive ion 4
The horizontal component of varies depending on the frequency of the horizontal power. In this case, the frequency is set to a value sufficiently lower than the frequency of the upper and lower electrodes. If the frequency is about the same as the upper and lower iFL&,
Reactive ions are hardly affected by horizontal electric fields. Furthermore, by controlling the frequency and power in the horizontal direction, the horizontal intensity of the reactive ions can be controlled.

In addition, it is also possible to apply unique powers in the X direction and the Y direction, but for example,
t + glnW t'O is the angular frequency, and t is proportional to the time. When AC power is applied, a uniform electric field that goes around at a constant period of 1/W is generated in the horizontal direction, so Enching is achieved. This allows all ions to be uniformly incident with any intensity in the horizontal direction as well as vertically, resulting in the ions being incident on the substrate at any angle as shown in Figure 9, allowing the shape of the object to be etched to be formed arbitrarily. Can be etched at an angle of

Furthermore, the horizontal voltage application does not need to be constant to the etching center; it is possible to create an etched shape with rounded corners as shown in Figure 10 by applying a strong voltage at the beginning of etching and weakening (or eliminating) it at the latter half. ] It is Noh. Therefore, in a method of manufacturing a semiconductor device including such a dry etching process, fine force+I processing is possible and step coverage of the upper layer is also improved.

As explained above, the dry etching method 8f of the present invention
: According to the method for manufacturing a semiconductor device, the lateral etching strength can be controlled arbitrarily, the etching residue at the stepped portion can be stably removed without increasing the number of etching residues in the entire process, and the etching shape can be made arbitrarily. The step coverage of the upper layer can be improved.

[Brief explanation of drawings]

Figure 1 is a front view of an etching device used in a conventional dry etching process, Figure 2 shows the state of etching in the conventional dry etching process, and Figure 5 shows the etching process performed in the conventional etching process. FIG. 3 is a sectional view showing an etched shape. Figure 4(a) is a cross-sectional view showing the state of the residue at the step part in the conventional dry etching process, and Figure 4(b) is a cross-sectional view showing the state of the film thickness at the step part. Figure 4 (C1 is a perspective view showing the state of residual liquid between interconnects in a conventional dry etching process. Figure 5 is a cross-sectional view 2 of a part of a semiconductor device processed by a conventional semiconductor device manufacturing method. This is a cross-sectional view showing the cross-sectional shape of the upper layer. Figures 6 and 7 are a front view and a dry etching apparatus used in the dry etching step included in the method of manufacturing a semiconductor device of the present invention, respectively. FIG. 8 is a diagram showing the entire etching process in the dry etching process included in the method of manufacturing a semiconductor device of the present invention, and FIG. 9 and FIG. 1 is a diagram showing an etched shape of an object processed by a dry etching process included in the following. 1... Interfrequency power, 2... Upper and lower electrodes, 5... Semiconductor substrate, 4... Reactive ions, 5... Etching residue 6... Object to be etched, object, 7.8... AC power applied to horizontal electrode, 9... Horizontal electrode, 10... Resist, Applicant: Seiko Electronics Industrial Co., Ltd.

Claims (3)

[Claims] (1) 1 in a reaction chamber with parallel plate electrodes.
When performing etching by introducing a type or several types of gas and applying high-frequency power to the parallel plate electrodes to turn the gas into T-plasma, a unique electrode is provided around the parallel plate electrode, and a unique electrode different from the above high frequency is used. A method for manufacturing a semiconductor device including an etching process in which alternating current power is applied. (2) The electrodes provided around the parallel plate electrodes are two parallel plate electrodes facing each other in the X and Y axis directions, and the applied AC power is k
2. The method of manufacturing a semiconductor device according to claim 1, wherein OB wt and sinwt are used. (3) A method for manufacturing a semiconductor device according to claim 1, characterized in that the alternating current power applied to the peripheral electrodes of the parallel plate is increased in the initial stage of etching, and is weakened or eliminated in the latter half.