JPS6110239A - Semiconductor manufacturing equipment - Google Patents

Semiconductor manufacturing equipment

Info

Publication number
JPS6110239A
JPS6110239A JP13142384A JP13142384A JPS6110239A JP S6110239 A JPS6110239 A JP S6110239A JP 13142384 A JP13142384 A JP 13142384A JP 13142384 A JP13142384 A JP 13142384A JP S6110239 A JPS6110239 A JP S6110239A
Authority
JP
Japan
Prior art keywords
chamber
etching
anode plate
wafer
over
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13142384A
Other languages
Japanese (ja)
Inventor
Yoshio Tate
館 良男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP13142384A priority Critical patent/JPS6110239A/en
Publication of JPS6110239A publication Critical patent/JPS6110239A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To enable dry etching in the optimum state by changing over a change-over switch at each time of sputter etching of a target on a wafer and plasma etching for removal of a deposited organic substance on the inner surface of a chamber. CONSTITUTION:At the time of reactive sputter etching of the target on the wafer 7, an anode plate 4 is changed over to the ground state by the change- over switch 8 into a self-bias state by the difference between the total area of the chamber 1 and the anode plate 4 and the area of a cathode 5, thus enabling anisotropic reactive sputter etching. In the case of removing an organic substance such as resist deposited on the inner surface of the chamber 1 by means of O2 plasma etching, the areas of the opposed electrode plates are equalized by changing the anode plate 4 over to the non-ground state, thus eliminating the self-bias; then, the deposited organic substance on the whole inner surface of the chamber 1 can be effectively removed.

Description

【発明の詳細な説明】 産業上の利用分野 この発明は半導体製造装置に関し、特に例えば反応性ス
パソタエ・ソチング装置において、工、チングとチャン
バー内面の付着有機物の除去とを効率よく行なえるよう
にしたものである。
[Detailed Description of the Invention] Industrial Application Field The present invention relates to semiconductor manufacturing equipment, and in particular, for example, in a reactive spasoter/soching equipment, it is possible to efficiently perform processing, ching, and removal of organic matter adhering to the inner surface of a chamber. It is something.

従来の技術 半導体装置を製造する場合、絶縁膜や導電膜のエツチン
グが必要である。従来これらのエツチングには、フッ酸
や硝酸等の工、チンダ液を用いる。
BACKGROUND OF THE INVENTION When manufacturing semiconductor devices, it is necessary to etch insulating films and conductive films. Conventionally, for these etchings, a process such as hydrofluoric acid or nitric acid, or a tinde solution is used.

いわゆるウニ、トエノチングが主流であったが、エツチ
ング液の調整が面倒であり、液もれも生じるし、水洗1
乾燥、廃液の処理が必要である等の問題点があるため、
最近ではガスエツチング、プラズマエ・ソチング、スパ
ッタエツチング、イオンビームエツチング等の、いわゆ
るドライエツチングが採用されている。特に反応性イオ
ンエツチング装置(R,1,E)とも呼ばれる反応性ス
パッタエツチングは、異方性エツチングが可能なため、
LSI、VLSHの製造に賞月されている。
So-called sea urchin etching was the mainstream, but it was troublesome to prepare the etching solution, leakage occurred, and it was difficult to wash with water.
Because there are problems such as the need for drying and treatment of waste liquid,
Recently, so-called dry etching methods such as gas etching, plasma etching, sputter etching, and ion beam etching have been adopted. In particular, reactive sputter etching, also called reactive ion etching equipment (R, 1, E), is capable of anisotropic etching.
Awarded for manufacturing LSI and VLSH.

第4図は従来の反応性スパッタエツチング装置の概念断
面図を示す。図において、1はアルミニウム等よりなる
チャンバーで、接地されている。
FIG. 4 shows a conceptual cross-sectional view of a conventional reactive sputter etching apparatus. In the figure, 1 is a chamber made of aluminum or the like, which is grounded.

このチャンバー1には反応ガスを導入する導入管2と、
真空引きするための排気管3とが接続されている。また
、チャンバー1内には、略同一面積のアノード極板4と
カソード極板5とが対向して配置されており、アノード
極板4は接地され、カソード極板5と大地との間に高周
波電源6が接続されている。
This chamber 1 includes an introduction pipe 2 for introducing a reaction gas,
An exhaust pipe 3 for evacuation is connected. Further, in the chamber 1, an anode plate 4 and a cathode plate 5 having approximately the same area are arranged facing each other, the anode plate 4 is grounded, and a high frequency A power source 6 is connected.

上記の構成において°、例えばSlウェーハ7上のS 
i O,膜にフォトレジストを用いて窓孔を形成する場
合について説明すると、まず、上記のウェーハ7をカソ
ード極板5上に配置し、排気管3から排慨してチャンバ
ー1内を10 ’ 〜I Q ’ TOrr程度に減圧
し、導入管2から反応ガスとしてCF。
In the above configuration, for example, S on the Sl wafer 7
To explain the case of forming a window hole in an iO, film using a photoresist, first, the above-mentioned wafer 7 is placed on the cathode plate 5, and the interior of the chamber 1 is 10' The pressure is reduced to approximately IQ' TOrr, and CF is introduced as a reaction gas from the introduction pipe 2.

/ Hlを導入し、高周波電源6を接続する。すると、
チャンバー1およびアノード極板4と、カソード極板5
との間で、両者の面積の違いによって、セルフバイアス
がかかつて放電が起こり、この放電領域内に置かれたウ
ェーハ7のレジストの窓孔から露出しているSin、膜
が活性フジ力/L’ F4およびイオンによって、異方
性エツチングされる。
/ Introduce Hl and connect the high frequency power supply 6. Then,
Chamber 1, anode plate 4, and cathode plate 5
Due to the difference in area between the two, a self-bias is generated and a discharge occurs, and the Sin film exposed through the window hole of the resist of the wafer 7 placed in this discharge area is activated by the Fuji force/L. ' Anisotropically etched by F4 and ions.

発明が解決しようとする問題点 ところで、上記反応性スパッタエツチング装置は、スパ
ッタリング中に対象物であるS10.のみナラス、マス
ク材としてのレジストも若干スパッタリングされて、チ
ャンバー1の内面に付着する。
Problems to be Solved by the Invention By the way, the above-mentioned reactive sputter etching apparatus has a problem in that during sputtering, the target object S10. However, some of the resist used as a mask material is sputtered and adheres to the inner surface of the chamber 1.

このため、所定数量のウェーハ7の処理が終るごとに、
チャンバー1内に反応性ガスとしてO2を導入シて、チ
ャンバー1の内面に付着したレジストを0.プラズマで
除去することが行なわれる。
Therefore, every time a predetermined number of wafers 7 are processed,
O2 is introduced into the chamber 1 as a reactive gas to remove the resist attached to the inner surface of the chamber 1. Removal with plasma is performed.

しかしながら、上記のようにチャンバー1を接地してい
ると、O,プラズマ時にもセルフバイアスがかかって異
方性プラズマエツチングが行なわれるため、チャンバー
1の内面全面のレジストを効率よく除去できず、全面の
レジストを除去しようとすると著しく長時間を要し、装
置の稼動率が悪くなるという問題点があった。
However, if the chamber 1 is grounded as described above, a self-bias is applied even during O plasma, and anisotropic plasma etching is performed, so the resist on the entire inner surface of the chamber 1 cannot be removed efficiently, and There was a problem in that it took a very long time to remove the resist, and the operating rate of the apparatus deteriorated.

問題点を解決するだめの手段 この発明は、少なくとも内面が導電性材料で形成され接
地されているチャンバーと、前記チャンバー内にこのチ
ャンバーと電気的に接続されて互いに対向する略同一面
積のアノード極板およびカソード極板と、前記アノード
極板およびカソード極板間に接続される高周波電源と、
前記アノード極板およびカソード極板の電剣的接続状即
を切換える切換えスイッチを備えるものである。
Means for Solving the Problems This invention provides a chamber whose at least inner surface is made of a conductive material and is grounded, and anode electrodes having approximately the same area and facing each other and electrically connected to the chamber. a high frequency power source connected between the plate and the cathode plate, and the anode plate and the cathode plate;
The apparatus is provided with a changeover switch for switching the electric sword-like connection state of the anode plate and the cathode plate.

作用 上記の手段によれば、ウェーハ上の対象物の反応性スパ
ッタエツチング時には、前記切換えスイッチによってア
ノード極板を接地状態に切換えて、チャンバーおよびア
ノード極板の和面積と、カソード極板の面積との違いに
よって、セルフバイアス状態にして、異方性反応性スパ
ッタエツチングを行なえる。また、チャンバーの内面に
付着した1/シスト等の有機物をOIデヲズマエフチン
グで除去する場合は、アノード極板を非接地状態に切換
えて、対向極板の面積を等しくして、セルフバイアスを
なくして、等方性0.プラズマエツチングにより、チャ
ンバーの内面全面の付着有機物を効率的に除去すること
ができる。
According to the above means, when performing reactive sputter etching of an object on a wafer, the anode plate is switched to the grounded state by the changeover switch, and the sum area of the chamber and the anode plate is equal to the area of the cathode plate. Depending on the difference in the irradiance, a self-bias state can be established and anisotropic reactive sputter etching can be performed. In addition, when removing organic matter such as 1/cyst attached to the inner surface of the chamber by OI plasma etching, switch the anode plate to an ungrounded state, make the areas of the opposing plates equal, and self-bias. isotropic 0. Plasma etching makes it possible to efficiently remove organic matter adhering to the entire inner surface of the chamber.

実施例 第1図はこの発明の−・実施例であるカソード結合型反
応性スバ、ソタエ1.チング装置の概念断面図を示す。
Embodiment FIG. 1 shows a cathode-coupled reactive substrate, Sotae 1, which is an embodiment of the present invention. 1 shows a conceptual cross-sectional view of the cutting device.

次の点を除いては第4図と同様であり、対応部分には同
一参照符号を付して、その説明を省略する。第4図と相
違する点は、チャンバー1とアノード極板4とを絶縁物
を介して電気的に絶縁したことと、高周波電源6の他端
と前記アノード極板4とを直接接続し、かつ両者の接続
点と大地間にスイッチ8を介挿したことである。
It is the same as FIG. 4 except for the following points, and corresponding parts are given the same reference numerals and their explanations will be omitted. The difference from FIG. 4 is that the chamber 1 and the anode plate 4 are electrically insulated via an insulator, and the other end of the high frequency power source 6 and the anode plate 4 are directly connected, and A switch 8 is inserted between the connection point between the two and the ground.

上記の構成において、ウェーハ7上のStO+[の異方
性反応性スバ、タエソチング時には、第2図に示すよう
に、チャン・バー1内にc F +/ Hz”t 4人
し、スイッチ8を閉成する。すると、アノード極板4が
接地され、このアノード極板4とチャンバー1との接地
電極面積が、カソード極板5の高周波印加電極面積より
大きくなることによ−て、セルフバイアスがかかって、
ウェーハ7上のS10゜膜が異方性の反応性スパッタエ
ツチングで除去される。
In the above configuration, when etching the anisotropically reactive substrate of StO+ on the wafer 7, as shown in FIG. Then, the anode plate 4 is grounded, and the ground electrode area between the anode plate 4 and the chamber 1 becomes larger than the high frequency application electrode area of the cathode plate 5, so that the self-bias is increased. Hanging,
The S10 film on wafer 7 is removed by anisotropic reactive sputter etching.

一方、チャンバー1の内面に付着したレシスト等の有機
物性を除去する場合は、第3図に示すように、チャンバ
ー1内にOlを導入し、スイッチ8を開成する。すると
、アノード極板4が非接地状部になって、アノード極板
4とカソード極板5との面積が同一であるためセルフバ
イアスはかからず、等方性のOlデヲズマエノチングで
チャンバー1の内面の付着有機物が除去される。
On the other hand, when removing organic materials such as resist attached to the inner surface of the chamber 1, as shown in FIG. 3, Ol is introduced into the chamber 1 and the switch 8 is opened. Then, the anode plate 4 becomes a non-grounded part, and since the areas of the anode plate 4 and the cathode plate 5 are the same, no self-bias is applied, and the isotropic Olodesma etching is performed. Adhering organic matter on the inner surface of the chamber 1 is removed.

なお、上記実施例はカソード結合型のものについて説明
したが、アノード結合型のものにおいても同様に実施で
きる。
Note that although the above embodiments have been described with respect to a cathode-coupled type, the same can be applied to an anode-coupled type.

壕だ、場合によっては、ウェーハ7上の対象物の反応性
スバ、ツタエツチング時にも、スイッチ8を開成して、
等方性のスバ、ソタエ、・ノチングを行なうこともでき
る。
In some cases, the switch 8 may be opened when etching reactive spots or vines of the target on the wafer 7.
You can also perform isotropic suba, sotae, and notching.

発明の効果 この発明は以上のように、ウェーハ上の対象物のスパJ
タエ・ソチング時とチャンバーの内面の付着有機物の0
.デヲズマエ・ノチング時とで、切換えスイッチを切換
えて、それぞれ最適状部てドライエツチングが行なえ、
特に付着有機物を短時間で効率よく除去できるので、装
置の稼動率を向上することができる。
Effects of the Invention As described above, the present invention provides spa J of an object on a wafer.
Zero organic matter adhering to the inner surface of the chamber during tae-soching
.. When dry etching and notching, change the selector switch to perform dry etching at the optimum shape, respectively.
In particular, since attached organic matter can be efficiently removed in a short time, the operating rate of the apparatus can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例の反応性スパックエツチン
グ装置の概念断面図で、第2図はウェーハ上の対象物の
異方性エツチング時の状態の概念断面図、第3図はチャ
ンバー内面の付着有機物の等方性エツチング時の状態の
概念断面図である。 第4図は従来の反応性ヌパノタエノチング装置の一例の
概念断面図である。 l・・・−・ チャンバー、 4 ・・ アノード極板、 5・・・ カソード極板、 6・・・・ 高周波電源、 8・・・ 切換えスイッチ。 第1図 第2図 第3図 第4図
FIG. 1 is a conceptual cross-sectional view of a reactive sprocket etching apparatus according to an embodiment of the present invention, FIG. 2 is a conceptual cross-sectional view of the state during anisotropic etching of an object on a wafer, and FIG. FIG. 3 is a conceptual cross-sectional view of the state of the attached organic matter during isotropic etching. FIG. 4 is a conceptual cross-sectional view of an example of a conventional reactive nupanotaenoting device. l...--Chamber, 4... Anode plate, 5... Cathode plate, 6... High frequency power supply, 8... Changeover switch. Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

【特許請求の範囲】[Claims] 少なくとも内面が導電性材料で形成され接地されている
チャンバーと、前記チャンバー内にこのチャンバーと電
気的に絶縁されて互いに対向する略同一面積のアノード
極板およびカソード極板と、前記アノード極板とカソー
ド極板間に接続される高周波電源と、前記アノード極板
およびカソード極板の電気的接続状態を切換える切換え
スイッチを備えてなる半導体製造装置。
a chamber having at least an inner surface formed of a conductive material and grounded; an anode electrode plate and a cathode electrode plate having substantially the same area and facing each other and electrically insulated from the chamber; A semiconductor manufacturing device comprising a high frequency power source connected between cathode plates, and a changeover switch for switching the electrical connection state of the anode plate and the cathode plate.
JP13142384A 1984-06-25 1984-06-25 Semiconductor manufacturing equipment Pending JPS6110239A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13142384A JPS6110239A (en) 1984-06-25 1984-06-25 Semiconductor manufacturing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13142384A JPS6110239A (en) 1984-06-25 1984-06-25 Semiconductor manufacturing equipment

Publications (1)

Publication Number Publication Date
JPS6110239A true JPS6110239A (en) 1986-01-17

Family

ID=15057611

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13142384A Pending JPS6110239A (en) 1984-06-25 1984-06-25 Semiconductor manufacturing equipment

Country Status (1)

Country Link
JP (1) JPS6110239A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02156634A (en) * 1988-12-09 1990-06-15 Hitachi Ltd Plasma cleaning
US5665167A (en) * 1993-02-16 1997-09-09 Tokyo Electron Kabushiki Kaisha Plasma treatment apparatus having a workpiece-side electrode grounding circuit
WO1999025494A1 (en) 1997-11-14 1999-05-27 Tokyo Electron Limited All-surface biasable and/or temperature-controlled electrostatically-shielded rf plasma source
US7785456B2 (en) 2004-10-19 2010-08-31 Jds Uniphase Corporation Magnetic latch for a vapour deposition system
US7790004B2 (en) 2004-08-20 2010-09-07 Jds Uniphase Corporation Substrate holder for a vapour deposition system
US7879209B2 (en) 2004-08-20 2011-02-01 Jds Uniphase Corporation Cathode for sputter coating
US7954219B2 (en) 2004-08-20 2011-06-07 Jds Uniphase Corporation Substrate holder assembly device
US8500973B2 (en) 2004-08-20 2013-08-06 Jds Uniphase Corporation Anode for sputter coating

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02156634A (en) * 1988-12-09 1990-06-15 Hitachi Ltd Plasma cleaning
US5665167A (en) * 1993-02-16 1997-09-09 Tokyo Electron Kabushiki Kaisha Plasma treatment apparatus having a workpiece-side electrode grounding circuit
WO1999025494A1 (en) 1997-11-14 1999-05-27 Tokyo Electron Limited All-surface biasable and/or temperature-controlled electrostatically-shielded rf plasma source
US7790004B2 (en) 2004-08-20 2010-09-07 Jds Uniphase Corporation Substrate holder for a vapour deposition system
US7879209B2 (en) 2004-08-20 2011-02-01 Jds Uniphase Corporation Cathode for sputter coating
US7954219B2 (en) 2004-08-20 2011-06-07 Jds Uniphase Corporation Substrate holder assembly device
US8163144B2 (en) 2004-08-20 2012-04-24 Tilsch Markus K Magnetron sputtering device
US8500973B2 (en) 2004-08-20 2013-08-06 Jds Uniphase Corporation Anode for sputter coating
US7785456B2 (en) 2004-10-19 2010-08-31 Jds Uniphase Corporation Magnetic latch for a vapour deposition system

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