JPS6116524A - Dry etching device - Google Patents

Dry etching device

Info

Publication number
JPS6116524A
JPS6116524A JP13761884A JP13761884A JPS6116524A JP S6116524 A JPS6116524 A JP S6116524A JP 13761884 A JP13761884 A JP 13761884A JP 13761884 A JP13761884 A JP 13761884A JP S6116524 A JPS6116524 A JP S6116524A
Authority
JP
Japan
Prior art keywords
etching
silicon
silicon nitride
coating member
target
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13761884A
Other languages
Japanese (ja)
Other versions
JPH0760815B2 (en
Inventor
Masao Tajima
田島 昌雄
Nobuhiro Endo
遠藤 伸裕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP59137618A priority Critical patent/JPH0760815B2/en
Publication of JPS6116524A publication Critical patent/JPS6116524A/en
Publication of JPH0760815B2 publication Critical patent/JPH0760815B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • ing And Chemical Polishing (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To prevent an irregularity from happening on an etching surface while improving the sectional shape of etching pattern by a method wherein, within the inner surface of a device coming into contact with discharge plasma, at least those surface exposed to violent ion shock is coated with silicon nitride. CONSTITUTION:Within a parallel flat type reacting sputter etching device, a target coating member 2 comprising silicon nitride and a ceramics opposite 6 sheet comprising silicon nitride are arranged on a target electrode 1 in a vacuum chamber 7. Then e.g. etching specimens 3 with silicon parts are arranged closely on the target coating member 2. Next silicon tetrachloride gas is jetted from an etching gas introducing and jetting tube 4 to adjust the interval of plasma discharge produced by means of impressing high frequency voltage from the power supply 5 thereof. Then after etching Si with specific thickness, the high frequency power supply is stopped to pick up the specimens 3. Through these procedures, an etching surface may avoid any polluted layers such as carbon while preventing an irregularity from happening to be provided with highly smooth and fine pattern.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は平行平板型のドライエツチング装置に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a parallel plate type dry etching apparatus.

(従来技術) 反応性スパッタエツチング又は反応性イオンエツチング
は水溶液エツチングに変る数々のオリAを有し、半導体
製造の分野において確立された技術である0このエツチ
ング法線、エツチング目的物質に見合ったターゲット電
極被覆部材とエツチング導入ガスとの組合によシエッテ
ング特性の向上を得ることが知られている。
(Prior Art) Reactive sputter etching or reactive ion etching is an established technology in the field of semiconductor manufacturing, with a number of orientations that replace aqueous etching. It is known that the etching characteristics can be improved by a combination of an electrode coating member and an etching introduction gas.

従来、シリコン物質の反応性スパッタエツチングにはタ
ーゲット電極被覆部材に石英(8i02)又は、アルミ
金属の表面アルミナコーティング(A40s)材を用い
、エツチング導入ガス体には、CCl5Fy  CC4
s  CF4 + Ox 、  SiF+ 、  SF
a +C1t tcc4 + Cl2などが用いられて
きた。ここでは高周波電界を印加して発生するプラズマ
中の活性イオンがカンード電極表面近傍のイオンシース
帯で加速され被エツチング試料に垂直入射する物理的な
イオン衝撃によるスパッタ効果と放電プラズマ中に発生
した化学的に活性な中性分子が被エツチング物質表面で
反応して揮発生成物を生成する化学反応によシ、エツチ
ングが進行する。
Conventionally, for reactive sputter etching of silicon materials, quartz (8i02) or surface alumina coating (A40s) of aluminum metal is used as the target electrode coating member, and CCl5Fy CC4 is used as the etching introduction gas.
s CF4 + Ox, SiF+, SF
a + C1t tcc4 + Cl2, etc. have been used. Here, active ions in the plasma generated by applying a high-frequency electric field are accelerated in the ion sheath zone near the surface of the canned electrode and are incident perpendicularly to the sample to be etched.The sputtering effect due to physical ion bombardment and the chemical reaction generated in the discharge plasma Etching progresses through a chemical reaction in which reactive neutral molecules react on the surface of the material to be etched to produce volatile products.

(従来技術の問題点) 上記の反応性スパッタエツチング技術も、従来の半導体
素子に用いられて来た、0.5ミクロン以下の多結晶シ
リコンや深さが0.5〜1ミクロン程度のシリコン基板
のエツチングではあまシ問題点を生じずアンダーカット
が少ない異方性エツチングを可能にし、それらの微細化
に対応できた。近年、微細化した新しい構造の半導体素
子の研究開発が活発に行なわれ、素子の電気的特性のエ
ツチング加工技術依存度が増大している。特に微細素子
分離方法には反応性スバッタエツテンダ技術を最大限に
活用する深い溝を用いた、いわゆるトレンチアイソレー
ジ目ンがある。この他1、シリコン基板に深い溝を設け
た後、溝側壁を絶縁膜で被覆し、続いて選択エピタキシ
ャル成長によシ学結晶シリコンを溝内に埋込む素子分離
方法もある。これらのいずれの場合でもシリコン基板の
深い溝堀に際しての微細パターンのエツチング形状が垂
直であることと、エツチング表面が荒れずに鏡面を保つ
・こと、シリコン表面が不純物によシ汚染されないこと
などが必要であるoしかしながら、これらの微細素子分
離のシリコン基板エツチング加工に前記のごとくエツチ
ング装置の電極の被覆部材に石英(Sift ) ’e
用い、かつエツチング導入ガスとしてCCI、 F、 
CCl4+ C1tガスを用いた場合、シリコン基板(
8i)のエツチング深さが0.5〜1ミクロン程度では
垂直形状を保っていたが、1.5ミクロンよシ深くなる
と、パターン側壁の中間部がくびれ丸形状を示し目的の
矩形性の良い形状が得られなかりた0また、反応生成物
質の再付着によシエッチング表面に荒れが生じた多元素
などの不純物原子で汚染されたシして集積回路の製造歩
留シを低  下させる原因となってい九〇 このため、石英ターゲット被覆部材を用いた場合には、
スバ、タエッチング後のC,F等汚染層を湿式エツチン
グを用いてシリコン表面から取シ除いたシ、熱酸化法等
を用いて表面回復処理を施す必要性があった。
(Problems with the prior art) The reactive sputter etching technique described above also applies to polycrystalline silicon substrates with a thickness of 0.5 microns or less and silicon substrates with a depth of about 0.5 to 1 micron, which have been used in conventional semiconductor devices. With this etching, we were able to perform anisotropic etching with fewer undercuts without causing any problems, and we were able to respond to these miniaturizations. In recent years, research and development of semiconductor elements with new miniaturized structures has been actively conducted, and the dependence of the electrical characteristics of the elements on etching processing technology has increased. In particular, as a fine device isolation method, there is a so-called trench isolation method that uses deep trenches that make full use of reactive sputter etender technology. In addition, there is another device isolation method in which deep trenches are formed in a silicon substrate, the trench sidewalls are covered with an insulating film, and then silicon crystalline silicon is buried in the trenches by selective epitaxial growth. In any of these cases, the etching shape of the fine pattern when trenching deep trenches in the silicon substrate is vertical, the etched surface remains mirror-like without becoming rough, and the silicon surface is not contaminated by impurities. However, as mentioned above, it is necessary to use quartz (Sift) as a covering member for the electrode of the etching device in the etching process of silicon substrates for separating microscopic elements.
CCI, F,
When CCl4+ C1t gas is used, silicon substrate (
When the etching depth of 8i) was about 0.5 to 1 micron, the vertical shape was maintained, but when the etching depth became deeper than 1.5 microns, the middle part of the pattern side wall became constricted and rounded, and the desired rectangular shape was obtained. In addition, the etched surface becomes rough due to redeposition of reaction products, and is contaminated with impurity atoms such as multiple elements, which reduces the manufacturing yield of integrated circuits. Therefore, when using a quartz target covering member,
It was necessary to remove the contaminant layer such as C and F after etching from the silicon surface by wet etching, and to perform a surface recovery treatment using a thermal oxidation method or the like.

(発明の目的) 本発明は従来の石英ターゲット電極被覆部材を用いるこ
とによって引起されるエツチング表面の荒れ、不純物質
原子によるエツチング表面汚染エツチングパターン側壁
のくびれ等を防止し、シリコン(Si )の深い溝堀シ
を必要とする微細素子分離等に再現性良く使用できるこ
とを目的としてなされたものである◎ (発明の構成) 本発明のドライエツチング装置は被エツチング物を電極
上に密接して配置すネトライエツチング装置において、
放電プラズマと接する装置内面のうち、少くとも強いイ
オン衝撃全う仕る表面が窒化ル素で被覆されていること
ヲ特徴とする0放電方式や、電極形状は問わない。
(Object of the Invention) The present invention prevents etching surface roughness caused by using a conventional quartz target electrode coating member, etching surface contamination by impurity atoms, constriction of etching pattern sidewalls, etc. This was developed for the purpose of being usable with good reproducibility in fine element separation that requires trenching. (Structure of the Invention) The dry etching apparatus of the present invention places the object to be etched closely on the electrode. In net retrieving equipment,
The 0-discharge method is characterized in that at least the surface of the inner surface of the device that is in contact with the discharge plasma and is subject to strong ion bombardment is coated with nitride, and the shape of the electrodes does not matter.

(発明の原理) 表面被覆部材の構成材料は耐スパツタ性と汚染源になら
ない物質であるととが必要で、その中で窒化ケイ素は、
最も適した唆質であ少、特にエツチング目的物質がシリ
コン(8i)の場合にエツチングガス体として四塩化ケ
イ素(stcZ、)を使用する時にその効果は顕著であ
る。
(Principle of the Invention) The constituent materials of the surface coating member must have spatter resistance and be a substance that does not become a source of contamination.
The effect is remarkable when using silicon tetrachloride (stcZ) as the etching gas, which is the most suitable stimulant, especially when the target material for etching is silicon (8i).

従来、問題点とな9ていた表面の荒れは、エツチング中
に装置表面から発生する水分や酸素とエツチングガスで
あるS i C14との反応によって8i01が生成し
、それがエツチングマスクとなったことによる。本発明
は装置表面からの酸素の供給を断つ仁とによシエッチン
グ表面の荒れを防ぎ、エツチングパターン断面形状の向
上を計ることにある◎また該被覆部材及びエツチング導
入ガス体に不純物質汚染源を含まないため溝堀エツチン
グ後に特に、汚染層を除去したシ、シリコン表面の回復
処理を施さなくても良く、プロセスの簡略化ができる。
The surface roughness, which has been a problem in the past, is due to the fact that 8i01 is produced by the reaction between moisture and oxygen generated from the surface of the device during etching and the etching gas SiC14, which becomes an etching mask. by. The purpose of the present invention is to prevent roughness of the etching surface and improve the cross-sectional shape of the etching pattern by cutting off the supply of oxygen from the surface of the device.Also, the purpose of the present invention is to prevent the etching surface from becoming rough and improve the cross-sectional shape of the etching pattern. Since it does not contain silicon, there is no need to perform recovery treatment on the silicon surface after removing the contaminant layer after trench etching, which simplifies the process.

(実施例) ゛本発明の典型的な実施例を図を用いて説明する。(Example) ``A typical embodiment of the present invention will be explained using the drawings.

第1図は模式的に示した平行平板型の反応性スパッタエ
ツチング装置である装置は、真空室7の中にターゲット
電極lO上に窒化ケイ素物質のセラミックから成るター
ゲット被覆部材2と窒化ケイ素物質のセラミック対向板
6から配置される。まず、前記窒化ケイ素セラミックの
ターゲット被覆部材の上にシリコン部分を有するエツチ
ング試料3、を密着配置する。次にステンレス製のエツ
チングガス導入吹出管4よシ、四塩化ケイ素ガス(8i
C4)k吹出し、高周波電界5を印加して発生するプラ
ズマ放電間隔を調整するQそして所定の厚さの8i?:
エツチングした後、高周波電界を止め、試料を取出す口 本発明の実施例では円板状の2つの電極を持つエツチン
グ装置について述べたが、本発明はこの例とほぼ同一状
況となる、多面体電極を持つエツチング装置や、イオン
源を独立して持つ反応性イオンビームエツチング装置1
i10  Torr以上の比較的高圧力の下で使用する
場合にも有効でアシ、特に、放電方式や電極形状を制限
するものではない。
FIG. 1 schematically shows a parallel plate type reactive sputter etching apparatus. The apparatus includes a target coating member 2 made of a silicon nitride ceramic material and a silicon nitride material ceramic on a target electrode lO in a vacuum chamber 7. The ceramic facing plate 6 is arranged first. First, an etching sample 3 having a silicon portion is closely placed on the silicon nitride ceramic target coating member. Next, remove silicon tetrachloride gas (8i
C4) Adjust the plasma discharge interval generated by applying a high-frequency electric field 5 to the k-blowout Q and a predetermined thickness of 8i? :
After etching, the high-frequency electric field is stopped and the sample is taken out. In the embodiment of the present invention, an etching device having two disc-shaped electrodes has been described, but the present invention uses a polyhedral electrode, which is in almost the same situation as this example. Reactive ion beam etching equipment with an independent ion source 1
It is effective even when used under a relatively high pressure of 110 Torr or more, and there are no particular limitations on the discharge method or electrode shape.

また本実施例ではターゲットと対向板の材料がすべて窒
化ケイ素からなる板を用いたが少くとも表面が窒化ケイ
素で被われていればよい。
Further, in this embodiment, plates made of silicon nitride were used for the target and the opposing plate, but it is sufficient that at least the surface is covered with silicon nitride.

また本実施例ではガス吹出管4はステンレス製゛のもの
をそのまま用いたが、その表面も窒化ケイ素でコーティ
ングすれば、汚染などを更に減少させるととができる。
Further, in this embodiment, the gas blowing pipe 4 was made of stainless steel and was used as it was, but if its surface was also coated with silicon nitride, contamination etc. could be further reduced.

また本実施例ではターゲット2は窒化ケイ素の円板をそ
のまま用いたが、熱放散を良くしたい場合などには試料
3を置く部分を切ル抜いた、切シ抜きターゲットを使う
とよい口 (発明の効果) 不純物汚染源となる原子を含まない窒化ケイ素セラミッ
クのターゲット電極被覆部材と同じ材質から成る対向板
に四塩化ケイ素のエツチング導入ガスを用いてスパッタ
エツチングを行うことによシ、Cなどの汚染層がないエ
ツチング表面が得られた。また8i01などの再付着を
原因としたエツチング表頁の荒れが防止でき、垂直形状
をもつ良好な微細パターンを平滑なエツチング表面が得
られるなど従来のシリコンの深い溝堀シ等における問題
点を解決する利点を有している。
Furthermore, in this example, a silicon nitride disk was used as target 2, but if you want to improve heat dissipation, it is recommended to use a cutout target with a cutout area for placing sample 3 (invention (Effect of C) By performing sputter etching using an etching gas of silicon tetrachloride on a counter plate made of the same material as the silicon nitride ceramic target electrode coating member that does not contain atoms that can be a source of impurity contamination, contamination such as C can be removed. A layer-free etched surface was obtained. In addition, it is possible to prevent roughness of the etched surface caused by re-adhesion of 8i01, etc., and to obtain a smooth etched surface with fine vertical patterns, which solves the problems associated with conventional deep trenching of silicon. It has the advantage of

1口面り巖羊q洸岨 第 1  l”i)  t、I  、会辱θ目 d ド
ライエッチンフ′ダ宕貿のp梵四ト[韻lめす。
1 mouth face wa yang 洸岨 1st l"i) t, I, insult θm d dry etching ff'da 宕商 p Sanskrit [rhyme l mesu.

Claims (1)

【特許請求の範囲】[Claims] 被エッチング物を電極上に密接して配置するドライエッ
チング装置において、放電プラズマと面する装置内面の
うち、少くとも強いイオン衝撃をうける表面が窒化硅素
で被覆されていることを特徴とするドライエッチング装
置。
A dry etching device in which an object to be etched is placed closely on an electrode, characterized in that, of the inner surface of the device facing the discharge plasma, at least the surface that receives strong ion bombardment is coated with silicon nitride. Device.
JP59137618A 1984-07-03 1984-07-03 Dry etching method Expired - Fee Related JPH0760815B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59137618A JPH0760815B2 (en) 1984-07-03 1984-07-03 Dry etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59137618A JPH0760815B2 (en) 1984-07-03 1984-07-03 Dry etching method

Publications (2)

Publication Number Publication Date
JPS6116524A true JPS6116524A (en) 1986-01-24
JPH0760815B2 JPH0760815B2 (en) 1995-06-28

Family

ID=15202884

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59137618A Expired - Fee Related JPH0760815B2 (en) 1984-07-03 1984-07-03 Dry etching method

Country Status (1)

Country Link
JP (1) JPH0760815B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS635528A (en) * 1986-06-25 1988-01-11 Nec Corp Reactive sputter etching device
JPS63138737A (en) * 1986-12-01 1988-06-10 Hitachi Ltd Dry etching apparatus
JPS6464325A (en) * 1987-09-04 1989-03-10 Denki Kagaku Kogyo Kk Electrode for plasma etching
JPS6464324A (en) * 1987-09-04 1989-03-10 Denki Kagaku Kogyo Kk Electrode for plasma etching
JPH0647309U (en) * 1992-12-11 1994-06-28 和子 伊阪 Shoulder pad case and clothes using it
EP0693865A1 (en) * 1994-07-22 1996-01-24 Alcatel Fibres Optiques Induction plasma torch

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5972720A (en) * 1982-10-19 1984-04-24 Inoue Japax Res Inc Manufacture of semiconductor
JPS59163827A (en) * 1983-03-09 1984-09-14 Toshiba Corp Plasma etching device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5972720A (en) * 1982-10-19 1984-04-24 Inoue Japax Res Inc Manufacture of semiconductor
JPS59163827A (en) * 1983-03-09 1984-09-14 Toshiba Corp Plasma etching device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS635528A (en) * 1986-06-25 1988-01-11 Nec Corp Reactive sputter etching device
JPS63138737A (en) * 1986-12-01 1988-06-10 Hitachi Ltd Dry etching apparatus
JPS6464325A (en) * 1987-09-04 1989-03-10 Denki Kagaku Kogyo Kk Electrode for plasma etching
JPS6464324A (en) * 1987-09-04 1989-03-10 Denki Kagaku Kogyo Kk Electrode for plasma etching
JPH0647309U (en) * 1992-12-11 1994-06-28 和子 伊阪 Shoulder pad case and clothes using it
EP0693865A1 (en) * 1994-07-22 1996-01-24 Alcatel Fibres Optiques Induction plasma torch
FR2722939A1 (en) * 1994-07-22 1996-01-26 Alcatel Fibres Optiques INDUCTION PLASMA TORCH
US5676863A (en) * 1994-07-22 1997-10-14 Alcatel Fibres Optiques Induction plasma torch

Also Published As

Publication number Publication date
JPH0760815B2 (en) 1995-06-28

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