JPH0196931A - Plasma etching device - Google Patents

Plasma etching device

Info

Publication number
JPH0196931A
JPH0196931A JP25537287A JP25537287A JPH0196931A JP H0196931 A JPH0196931 A JP H0196931A JP 25537287 A JP25537287 A JP 25537287A JP 25537287 A JP25537287 A JP 25537287A JP H0196931 A JPH0196931 A JP H0196931A
Authority
JP
Japan
Prior art keywords
electrode
electrodes
wafer
force
plasma etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25537287A
Other languages
Japanese (ja)
Inventor
Tamio Matsumura
民雄 松村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP25537287A priority Critical patent/JPH0196931A/en
Publication of JPH0196931A publication Critical patent/JPH0196931A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To enable etching rate within wafer surface to be uniform as much as possible by providing the first and second flat plate like electrodes which were arranged in parallel each other and by continuously changing the distance between electrodes at least at either periphery in reference to the direction between electrodes. CONSTITUTION:If the supply of echants is larger near the outer periphery of wafer, etching is performed by applying a highfrequency voltage between upper and lower electrodes 1 and 2 which were arranged opposing each other. In this case, since a taper like electrode part 10 is provided at the periphery of a lower electrode 2 where a wafer 3 is placed, an electric line of force 9 from the upper electrode 1 is pulled toward the side of the electrode part 10 and the density of the electric line of force 9 at the outer periphery becomes small. Namely, by properly setting the length L of the electrode part 10 and the taper angle theta, the density of the electric line of force 9 at the periphery can be varied and adjusted. And the larger the length L and angle theta are made, the smaller the density of the electric line of force 9 becomes. It allows the etching rate at the central part and outer periphery part on the surface of the wafer 3 to be equal as much as possible.

Description

【発明の詳細な説明】 〔産業上のfil用分野〕 この発明は、半導体装置などの製造に際し、対象物をエ
ツチング加工するために使用されるプラズマエツチング
装置に関し、さらに詳しくは、平行平板電極型のプラズ
マエツチング装置の改良に係るものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of industrial fil] The present invention relates to a plasma etching apparatus used for etching a target object during the manufacture of semiconductor devices, and more particularly, to a plasma etching apparatus using a parallel plate electrode type. This invention relates to an improvement of a plasma etching apparatus.

〔従来の技術〕[Conventional technology]

従来例によるこの種の平行平板電極型プラズマエツチン
グ装置のR要構成を第3図(a) 、 (b)に示す。
The basic configuration of a conventional parallel plate electrode type plasma etching apparatus of this type is shown in FIGS. 3(a) and 3(b).

すなわち、この第3図(a)、(b)に示す従来例での
平行平板電極型プラズマエツチング装置において、符号
1は上部電極(第1の平面状電極)、2はこの上部電極
】に対向配置されてウェハステージとなる下部電極(第
2の平面状電極)であり、また、3は前記下部電極2上
に載置される被エツチング対象物としてのウェハ、4お
よび5はこれらの上下各電極1および2の電極配線、6
はアース、7はこれらの上下各電極1.2間に高周波電
圧を印加してプラズマを発生させるための高周波電源、
8はこれらの上下各電極1.2間の電極間隔、8は同上
電気力線である。
That is, in the conventional parallel plate electrode type plasma etching apparatus shown in FIGS. 3(a) and 3(b), reference numeral 1 indicates an upper electrode (first planar electrode), and 2 indicates an electrode opposite to this upper electrode. A lower electrode (second planar electrode) is arranged and serves as a wafer stage, 3 is a wafer as an object to be etched placed on the lower electrode 2, and 4 and 5 are the upper and lower electrodes, respectively. Electrode wiring for electrodes 1 and 2, 6
is ground, 7 is a high-frequency power source for applying a high-frequency voltage between these upper and lower electrodes 1.2 to generate plasma;
Reference numeral 8 indicates an electrode interval between the upper and lower electrodes 1.2, and 8 indicates lines of electric force.

そして、この従来例では、対向された上下各電極1,2
間にあって、直流バイアスがウェハ3上に垂直にかけら
れるように、これらの上下各電極1゜2構造が設計され
ており、かつその電気力線9の密度についても、これが
下部電極2上にQ’c’tされるウェハ3トに垂直にか
けられるように構成されている。
In this conventional example, the upper and lower electrodes 1 and 2 are opposed to each other.
In between, the upper and lower electrodes 1°2 structure is designed so that a DC bias is applied perpendicularly to the wafer 3, and the density of the electric lines of force 9 is such that the density of the electric lines of force 9 is Q' It is configured to be hung perpendicularly to the wafer to be processed.

しかして、この従来例構成の場合、前記した上部電極1
および下部電極2は、通常、真空ポンプで引かれた真空
室内に配置されており、かつ下部電極2上には、被エツ
チング対象物であるウェハ3を載首させて準備する。そ
して、この状態で真空室内には、エツチングガスが導入
され、かつ適当な圧力下での高周波電源7による上下各
電極l。
However, in the case of this conventional configuration, the above-mentioned upper electrode 1
The lower electrode 2 is usually arranged in a vacuum chamber drawn by a vacuum pump, and a wafer 3 to be etched is placed on the lower electrode 2 to prepare. In this state, etching gas is introduced into the vacuum chamber, and the upper and lower electrodes 1 are connected to each other by a high frequency power source 7 under an appropriate pressure.

2間への電圧印加によって、これらの上下各電極1.2
間にプラズマが発生され、このプラズマ中のイオンとか
ラジカルがエッチャントになってウェハ3に当てられる
ことにより、物理的および化学的な反応を生じて、この
ウェハ3上の膜などを、通常は所定のパターン通り選択
的にエツチング除去し得るのである。
By applying a voltage between 2, each of these upper and lower electrodes 1.2
During this time, plasma is generated, and the ions and radicals in this plasma become etchants and are applied to the wafer 3, causing physical and chemical reactions, which usually cause the film on the wafer 3 to become etchant. The pattern can be selectively removed by etching.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の平行平板電極型プラズマエツチング装置は、前記
のように構成されていて、対向配首された上下の各電極
1.2により、ウェハ3上に垂直にかけられる電気力線
9の密度が、全体的に等しくされているために、ウェハ
3にかけられるエッチャントの供給と反応とにアンバラ
ンスを生じた場合、つまり、いわゆる、ローティング効
果を生じたときには、ウェハ内でのエツチングレートの
均一性が、このローティング効果に左右されて、そのエ
ツチング加工に不利を生じて了うと云う、好ましくない
問題点を有するものであった。
The conventional parallel plate electrode type plasma etching apparatus is constructed as described above, and the density of the electric lines of force 9 applied perpendicularly to the wafer 3 is increased by the upper and lower electrodes 1.2 arranged to face each other. If the etchant supply and reaction applied to the wafer 3 become unbalanced, that is, when a so-called loading effect occurs, the uniformity of the etching rate within the wafer will change. This loading effect has an undesirable problem in that the etching process is disadvantageous.

従って、この発明の目的とするところは、従来例装置で
のこのような問題点に鑑み、エツチングレートを可及的
均一に調整できるようにした。この種のプラズマエツチ
ング装置を提供することである。
Therefore, an object of the present invention is to make it possible to adjust the etching rate as uniformly as possible in view of the above-mentioned problems with the conventional apparatus. It is an object of the present invention to provide a plasma etching apparatus of this type.

〔問題点を解決するための手段〕[Means for solving problems]

前記の目的を達成させるために、この発明に係るプラズ
マエツチング装置は、第1の平板状電極と、ウェハステ
ージとなる第2の平板状電極とを対向して平行に配置さ
せ、これらの各電極間に高周波電圧を印加し得るように
したプラズマエツチング装置において、前記各電極の少
なくとも何れか一方の周辺部の電極間距離を、電極間方
向に対して連続的に変化させるように構成したものであ
る。
In order to achieve the above object, the plasma etching apparatus according to the present invention includes a first flat electrode and a second flat electrode serving as a wafer stage, which are arranged facing each other in parallel. A plasma etching apparatus capable of applying a high frequency voltage between the electrodes, wherein the distance between the electrodes at the peripheral portion of at least one of the electrodes is continuously changed in the direction between the electrodes. be.

〔作   用〕[For production]

すなわち、この発明においては、相互に平行に配置され
た第1の平板状電極と第2の平板状電極とを設けて、そ
の少なくとも何れか一方の周辺部の電極間距離を、電極
間方向に対して連続的に変化させるように構成しである
ため、これらの各電極間に高周波電圧を印加させること
により、エッチャントの供給が多い部分での電気力線密
度を小さく、かつエッチャントの供給が少ない部分での
電気力線密度を大きくさせ得て、ウェハ内外の電気力線
分布の補正、ひいては、結果的にウェハ面内のエツチン
グレートを可及的均一に補正できるのである。
That is, in this invention, a first flat electrode and a second flat electrode are provided that are arranged parallel to each other, and the distance between the electrodes at the peripheral portion of at least one of them is set in the direction between the electrodes. By applying a high frequency voltage between each of these electrodes, the density of electric lines of force can be reduced in areas where a large amount of etchant is supplied, and the etchant supply is also small. It is possible to increase the density of electric lines of force at a certain portion, thereby making it possible to correct the distribution of electric lines of force inside and outside the wafer, and as a result, correct the etching rate within the wafer plane as uniformly as possible.

〔実 施 例〕〔Example〕

以下、この発明に係るプラズマエツチング装置の第1お
よび第2実施例につき、第1図および第2図を参照して
詳細に説明する。
Hereinafter, first and second embodiments of the plasma etching apparatus according to the present invention will be described in detail with reference to FIGS. 1 and 2.

第1実施例は、プラズマによって発生したイオンとかラ
ジカルのエッチャントの供給が、被エツチング対象物で
あるウェハの外周に近くなるほど多い場合の例であり、
また、第2実施例は、これとは反対にエッチャントの供
給が、ウェハの外周に近くなるほど少ない場合の例であ
る。
The first embodiment is an example in which the supply of ion or radical etchant generated by plasma increases as it approaches the outer periphery of the wafer, which is the object to be etched.
In contrast, the second embodiment is an example in which the supply of etchant decreases as the wafer approaches the outer periphery.

まず、第1図(a)、(b)はこの発明の第1実施例を
適用したプラズマエツチング装置の概要構成を模式的に
示す断面説明図、および各電極を上方からみた平面図で
あり、この第1図(a)、(b)に示す第1実施例構成
において、前記第3図(a) 、(b)に示す従来例構
成と同一符号は同一または相当部分を表わしている。
First, FIGS. 1(a) and 1(b) are a cross-sectional explanatory diagram schematically showing the general configuration of a plasma etching apparatus to which a first embodiment of the present invention is applied, and a plan view of each electrode viewed from above. In the configuration of the first embodiment shown in FIGS. 1(a) and (b), the same reference numerals as in the conventional configuration shown in FIGS. 3(a) and (b) represent the same or corresponding parts.

すなわち、この第1実施例においても、符号1は上部電
極(第1の平面状電極)、2はこの上部電極1に対向配
置されてウェハステージとなる下部電極(第2の平面状
電極)であり、この下部電極2の周辺部には、上部電極
1との電極間距離が電極間方向に対して連続的に変化す
るように、符号11で示す長さし、12で示すテーパー
角度θで立上げたテーパー状電極部lOを設けである。
That is, in this first embodiment as well, the reference numeral 1 is an upper electrode (first planar electrode), and the reference numeral 2 is a lower electrode (second planar electrode) that is arranged opposite to the upper electrode 1 and serves as a wafer stage. The peripheral part of the lower electrode 2 has a length indicated by 11 and a taper angle θ indicated by 12 so that the distance between the electrodes and the upper electrode 1 changes continuously in the direction between the electrodes. A raised tapered electrode portion IO is provided.

また、3は前記下部電極2上に載置される被エツチング
対象物としてのウェハ、4および5はこれらの上下各電
極1および2に対する電極配線、6は同アース、7はこ
れらの上下各電極1,2間に高周波電圧を印加してプラ
ズマを発生させるための高周波電源、8はこれらの上下
各電極1,2間の電極間隔、9は同上電気力線である。
Further, 3 is a wafer as an object to be etched placed on the lower electrode 2, 4 and 5 are electrode wirings for the upper and lower electrodes 1 and 2, 6 is the ground, and 7 is the upper and lower electrodes. A high frequency power supply is used to generate plasma by applying a high frequency voltage between the electrodes 1 and 2, 8 is an electrode interval between the upper and lower electrodes 1 and 2, and 9 is a line of electric force.

しかして、この第1実施例構成は、前記したようにエッ
チャントの供給がウェハの外周に近くなるほど多い場合
に適用する例であって、こ\でも前記従来例と同様に、
対向配置された上下の各電極1.2間への高周波電圧の
印加により、プラズマを発生させて所期のエツチングを
行なうのであるが、この場合には、ウェハ3を載置する
下部電極2の周辺部に、テーパー状電極部lOを設けで
あるために、上部電極lからめ電気力線8が、このテ 
 ゛−パー状電極部10側、ひいてはエッチャントの供
給の多いウェハ3の外周部分で、同テーパー状電極部l
O側に引寄せられることになって、所期通りに同外周部
分での電気力線8の密度を小さくし得るのである。
As described above, the configuration of the first embodiment is an example applied to the case where the supply of etchant increases closer to the outer periphery of the wafer.
Plasma is generated by applying a high frequency voltage between the upper and lower electrodes 1.2 which are arranged to face each other, and the desired etching is performed. Since the tapered electrode part lO is provided at the peripheral part, the electric lines of force 8 from the upper electrode l are connected to this electrode part lO.
On the side of the tapered electrode part 10, and furthermore, in the outer peripheral part of the wafer 3 where a large amount of etchant is supplied, the tapered electrode part l
As a result, the density of the electric lines of force 8 at the outer peripheral portion can be reduced as expected.

つまり、換言すると、テーパー状電極部lOの長さしと
、テーパー角度θとを適切に設定することによって、ウ
ェハ3の周辺部での電気力線8の密度を変化調整できる
のであり、こ−では、このテーパー状電極部10の長さ
しおよびテーパー角度θを大きくすればするほど、電気
力線8の密度が小さくなる。
In other words, by appropriately setting the length of the tapered electrode portion IO and the taper angle θ, it is possible to change and adjust the density of the electric lines of force 8 at the periphery of the wafer 3. Now, as the length and taper angle θ of the tapered electrode portion 10 are increased, the density of the electric lines of force 8 becomes smaller.

従って、この第1実施例構成の場合には、たとえウェハ
3の外周に近くなるほどエッチャントの供給が多くても
、下部電極2側でのテーパー状電極部10の存在によっ
て、同外周部分での電気力線9の密度が小さくされるこ
とから、結果的にウェハ3面での中心部側と外周部側と
のエツチングレートを可及的に等しくさせ得るのである
Therefore, in the case of the configuration of the first embodiment, even if more etchant is supplied closer to the outer periphery of the wafer 3, the presence of the tapered electrode portion 10 on the lower electrode 2 side causes the electricity at the outer periphery to increase. Since the density of the lines of force 9 is reduced, it is possible to make the etching rates as equal as possible on the central and outer peripheral sides of the wafer 3.

次に、第2図(a)、(b)に示す第2実施例は、前記
第1実施例の場合とは反対に、上部電極1側の外周部に
あって、テーパー状電極部1Gを設けたものであり、こ
の第2実施例構成の場合には、上部電極1からの電気力
線8.殊に、このテーパー状電極部10側からの電気力
線9が、下部電極2側、ひいてはエッチャントの供給の
少ないウェハ3の外周部分に引寄せられるために、この
電気力線3の密度を所期通りに同外周部分で大きくし得
るのである。
Next, in the second embodiment shown in FIGS. 2(a) and 2(b), contrary to the first embodiment, a tapered electrode portion 1G is provided on the outer circumferential portion of the upper electrode 1 side. In the case of this second embodiment configuration, electric lines of force 8. from the upper electrode 1 are provided. In particular, since the electric lines of force 9 from the tapered electrode portion 10 are attracted to the lower electrode 2 side, and further to the outer circumference of the wafer 3 where less etchant is supplied, the density of the electric lines of force 3 can be reduced to a certain level. This means that it can be made larger at the same outer periphery in time.

従って、この第2実施例構成の場合には、たとえウェハ
3の外周に近くなるほどエッチャントの供給が少なくて
も、上部電極1側でのテーパー状電極部10の存在によ
って、同外周部分での電気力線8の密度が大きくされる
ことから、こ−でも結果的にウェハ3面での中心部側と
外周部側とのエツチングレートを可及的に等しくさせ得
るのである。
Therefore, in the case of the configuration of the second embodiment, even if the supply of etchant decreases as the closer to the outer periphery of the wafer 3, the presence of the tapered electrode portion 10 on the upper electrode 1 side causes the electricity at the outer periphery to decrease. Since the density of the lines of force 8 is increased, this also makes it possible to make the etching rates as equal as possible on the central and outer peripheral sides of the wafer 3.

〔発明の効果〕〔Effect of the invention〕

以上詳述したように、この発明によれば、第1の平板状
電極と、ウェハステージとなる第2の平板状電極とを対
向して平行に配置させ、これらの各電極間に高周波電圧
を印加し得るようにしたプラズマエツチング装置におい
て、相互に対向して平行に配置された第1の平板状電極
と第2の平板状電極とを設けて、その少なくとも何れか
一方の周辺部の電極間距離を、電極間方向に対して連続
的に変化させるように構成しであるため、これらの各電
極間に高周波電圧を印加させてプラズマを発生させた場
合、エッチャントの供給が多い部分での電気力線密度を
小さく、かつエッチャントの供給が少ない部分での電気
力線密度を大きくさせることができ、エツチング条件に
対応したウェハ内外の電気力線の補正、ひいては、結果
的にウエハ面内のエツチングレートを適切に調整できて
、エチング加工の均一性を格段に向上し得るのであり、
しかも、具体的には、第1.第2の何れか一方の電極に
テーパー状電極部を設けるだけの構成であるために、現
在使用中の装置にも比較的容易に適用できるなどの優れ
た特長を有するものである。
As detailed above, according to the present invention, the first flat electrode and the second flat electrode serving as the wafer stage are arranged facing each other in parallel, and a high frequency voltage is applied between each of these electrodes. In the plasma etching apparatus, a first flat electrode and a second flat electrode are arranged facing each other in parallel, and a gap between the electrodes is provided in the peripheral area of at least one of the first and second flat electrodes. Since the distance is configured to change continuously in the direction between the electrodes, when a high frequency voltage is applied between each of these electrodes to generate plasma, the electricity will increase in the area where a large amount of etchant is supplied. It is possible to reduce the density of lines of force and increase the density of lines of electric force in areas where there is little etchant supply, correcting the lines of electric force inside and outside the wafer according to the etching conditions, and eventually improving etching within the wafer plane. The rate can be adjusted appropriately and the uniformity of the etching process can be greatly improved.
Moreover, specifically, the first. Since the configuration is such that only one of the second electrodes is provided with a tapered electrode portion, it has excellent features such as being relatively easily applicable to devices currently in use.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)、(b)はこの発明に係るプラズマエツチ
ング装置の第1実施例による概要構成を模式的に示す断
面説明図、および各電極を上方からみた平面図、第2図
(a) 、 (b)は同上プラズマエツチング装置の第
2実施例による概要構成を模式的に示す断面説明図、お
よび各電極を上方からみた平面図であり、また、第3図
は従来例による同上プラズマエツチング装置の概要構成
を模式的に示す断面説明図、および各電極を上方からみ
た平面図である。 1・・・・上部電極(第1の平面状電極)、2・・・・
下部電極(第2の平面状電極)、3・・・・ウェハ、4
.5・・・・電極配線、7・・・・高周波電源、8・・
・・電極間隔、3・・・・電気力線、10・・・・テー
パー状電極部。 代理人  大  岩  増  雄
FIGS. 1(a) and 1(b) are cross-sectional explanatory views schematically showing the general configuration of a first embodiment of a plasma etching apparatus according to the present invention, a plan view of each electrode viewed from above, and FIG. 2(a). ) and (b) are cross-sectional explanatory views schematically showing the general configuration of the second embodiment of the above plasma etching apparatus, and a plan view of each electrode viewed from above, and FIG. FIG. 2 is an explanatory cross-sectional view schematically showing the general structure of an etching device, and a plan view of each electrode viewed from above. 1... Upper electrode (first planar electrode), 2...
Lower electrode (second planar electrode), 3... wafer, 4
.. 5... Electrode wiring, 7... High frequency power supply, 8...
... Electrode spacing, 3... Lines of electric force, 10... Tapered electrode portion. Agent Masuo Oiwa

Claims (3)

【特許請求の範囲】[Claims] (1)第1の平板状電極と、ウェハステージとなる第2
の平板状電極とを対向して平行に配置させ、これらの各
電極間に高周波電圧を印加し得るようにしたプラズマエ
ッチング装置において、前記各電極の少なくとも何れか
一方の周辺部の電極間距離を、電極間方向に対して連続
的に変化させるように構成したことを特徴とするプラズ
マエッチング装置。
(1) A first flat electrode and a second plate-shaped electrode that becomes a wafer stage.
In a plasma etching apparatus in which flat plate electrodes are arranged facing each other in parallel and a high frequency voltage can be applied between each of these electrodes, the distance between the electrodes at the peripheral part of at least one of the electrodes is A plasma etching apparatus characterized in that the plasma etching apparatus is configured to continuously change the direction between the electrodes.
(2)第1の平板状電極の周辺部に、第2の平板状電極
側に向けて、所定のテーパー角度で立下げたテーパー状
電極部を形成させたことを特徴とする特許請求の範囲第
1項に記載のプラズマエッチング装置。
(2) Claims characterized in that a tapered electrode portion is formed in the peripheral portion of the first flat electrode toward the second flat electrode at a predetermined taper angle. The plasma etching apparatus according to item 1.
(3)第2の平板状電極の周辺部に、第1の平板状電極
側に向けて、所定のテーパー角度で立上げたテーパー状
電極部を形成させたことを特徴とする特許請求の範囲第
1項に記載のプラズマエッチング装置。
(3) Claims characterized in that a tapered electrode part is formed in the peripheral part of the second flat electrode at a predetermined taper angle toward the first flat electrode. The plasma etching apparatus according to item 1.
JP25537287A 1987-10-09 1987-10-09 Plasma etching device Pending JPH0196931A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25537287A JPH0196931A (en) 1987-10-09 1987-10-09 Plasma etching device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25537287A JPH0196931A (en) 1987-10-09 1987-10-09 Plasma etching device

Publications (1)

Publication Number Publication Date
JPH0196931A true JPH0196931A (en) 1989-04-14

Family

ID=17277854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25537287A Pending JPH0196931A (en) 1987-10-09 1987-10-09 Plasma etching device

Country Status (1)

Country Link
JP (1) JPH0196931A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011519117A (en) * 2008-03-20 2011-06-30 アプライド マテリアルズ インコーポレイテッド Adjustable ground plane in the plasma chamber
JP2013141004A (en) * 2007-05-18 2013-07-18 Lam Research Corporation Volume variable type plasma processing chamber and method used in the same
CN109037020A (en) * 2018-07-26 2018-12-18 德淮半导体有限公司 Plasma device and its working method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013141004A (en) * 2007-05-18 2013-07-18 Lam Research Corporation Volume variable type plasma processing chamber and method used in the same
JP2011519117A (en) * 2008-03-20 2011-06-30 アプライド マテリアルズ インコーポレイテッド Adjustable ground plane in the plasma chamber
CN103594340A (en) * 2008-03-20 2014-02-19 应用材料公司 Tunable ground plane in plasma chamber
JP2014053309A (en) * 2008-03-20 2014-03-20 Applied Materials Inc Tunable ground planes in plasma chambers
CN109037020A (en) * 2018-07-26 2018-12-18 德淮半导体有限公司 Plasma device and its working method

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