JPS6247132A - Parallel flat plate type dry etching device - Google Patents

Parallel flat plate type dry etching device

Info

Publication number
JPS6247132A
JPS6247132A JP18761285A JP18761285A JPS6247132A JP S6247132 A JPS6247132 A JP S6247132A JP 18761285 A JP18761285 A JP 18761285A JP 18761285 A JP18761285 A JP 18761285A JP S6247132 A JPS6247132 A JP S6247132A
Authority
JP
Japan
Prior art keywords
sample
etching
electrodes
etched
periphery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18761285A
Other languages
Japanese (ja)
Inventor
Kimiyoshi Kimura
公美 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP18761285A priority Critical patent/JPS6247132A/en
Publication of JPS6247132A publication Critical patent/JPS6247132A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To uniformly etch the entire surface of a wafer by differentiating a distance between electrodes at the center and the periphery of a sample to be etched. CONSTITUTION:The lower surface of an electrode 4 opposed to an electrode 3 for placing a sample 5 is stepwisely formed from the center toward the peripheral edge, and a distance l2 between electrodes at the center of the sample 5 and a distance l1 between the electrodes at the periphery are l1>l;2. Thus, an electric field between the electrodes becomes small toward the periphery, the sample is substantially uniformly treated at etching ending time to be effective in microminiaturization. The electrode structure may be formed in a cup- shape in addition to the stepwise shape.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置、特に微細加工精度を要求されるL
SI、VLSIのドライエツチング用の平行平板型ドラ
イエツチング装置に関する。
[Detailed Description of the Invention] [Industrial Field of Application] The present invention is applicable to semiconductor devices, especially L/L devices that require fine processing precision.
This invention relates to a parallel plate type dry etching apparatus for dry etching of SI and VLSI.

〔従来の技術〕[Conventional technology]

近年、ガスプラズマを用いたエツチング技術は、各種半
導体素子、特にLSIの微細加工技術として広く用いら
れている。r、srが高機能高密度化になルニ従いエツ
チングパターンはサブミクロン領域に入り、その加工形
状はますます厳しくなっている。ドライエツチング技術
はこの様な微細加工になくてはならない技術として一般
的になってきた。
In recent years, etching technology using gas plasma has been widely used as a microfabrication technology for various semiconductor devices, especially LSIs. As r and sr become more highly functional and dense, etching patterns are entering the sub-micron range, and their processing shapes are becoming increasingly difficult. Dry etching technology has become popular as an indispensable technology for such microfabrication.

ドライエツチングモードとしてはプラズマエツチング、
ス・やツタエツチング、イオンビームエツチング等があ
げられ、エツチング方向性として等方性、異方性があり
、特に微細加工については異方性エツチングが主流とな
ってきた。異方性エッチンクハ通常スパッタエツチング
、イオンビームエツチング法が用いられるが、ここでは
平行平板形のス・七ツタエツチングの加工形状、特にエ
ツチングにより加工されたパターンの断面形状について
説明する。
Dry etching modes include plasma etching,
Examples include etching, ivy etching, and ion beam etching. Etching directionality includes isotropy and anisotropy, and anisotropic etching has become mainstream, especially for microfabrication. Sputter etching and ion beam etching are usually used for anisotropic etching, but here we will explain the processed shape of parallel plate-shaped sputter etching, especially the cross-sectional shape of the pattern processed by etching.

平行平板型ドライエツチング装置の概要図を第2図に示
す。図において、3,4はエツチング反応槽l内に設置
された電極、2は高周波電源、5は被エツチング試料で
ある。
A schematic diagram of a parallel plate type dry etching apparatus is shown in FIG. In the figure, 3 and 4 are electrodes installed in the etching reaction tank 1, 2 is a high frequency power source, and 5 is a sample to be etched.

従来、エツチングの異方性はガスの種類、ガス圧力、ガ
ス流速に依存するほかに、特に平行平板型装置において
は高周波電力9周波数、電極材料。
Conventionally, the anisotropy of etching depends on the type of gas, gas pressure, gas flow rate, and, especially in parallel plate type devices, the high frequency power, the electrode material.

電極間隔など多くのパラメータに依存することが知られ
ている。更に被エツチング試料の平板基板に於ては、基
板の周囲と中心ではエツチング速mが異なり一般的には
周囲が早くエツチングされる。
It is known that it depends on many parameters such as electrode spacing. Furthermore, in a flat substrate as a sample to be etched, the etching speed m is different between the periphery and the center of the substrate, and generally the periphery is etched faster.

同一半導体基板ヒの・ぐターニングを均一にエツチング
することが重要であるLSIについて、半導体基板の周
囲と中心でエツチング終了時点が異なることは、デバイ
スの信頼性からみても好ましくない。エツチングの反応
機構は物理反応と化学反応の複合反応として考えられる
。被エツチング表面への反応性イオン衝撃は物理反応と
してとらえられ、′電極間のバイアス及び電界分布が大
きな・ぐラメ−ターとなる。
For LSI devices, for which it is important to uniformly etch the same semiconductor substrate, it is undesirable from the standpoint of device reliability that the etching ends at different times at the periphery and center of the semiconductor substrate. The reaction mechanism of etching is considered to be a complex reaction of physical and chemical reactions. Reactive ion bombardment on the surface to be etched can be viewed as a physical reaction, and the bias and electric field distribution between the electrodes are major parameters.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来は第3図に示されるごとく、被エツチング試料5に
対し上部の対向電極4は試料表面に対し平行になってい
る。前述の如く試料の周囲と中心部とのエツチング終了
時が種々の要因により異なり、中心部のエツチング終了
が周囲に比べ遅くなることかわかっている。従来の平行
平板型ドライエツチング装置は、被エツチング試料表面
の中心部分と周囲部分ではエツチング終市時が異なり、
周囲部分が早くエツチングされてし15等の不具合が多
く、信頼性的にも大きな問題となっていた。
Conventionally, as shown in FIG. 3, the counter electrode 4 above the sample 5 to be etched is parallel to the surface of the sample. As mentioned above, it is known that the time at which etching is completed at the periphery and the center of the sample differs depending on various factors, and that etching at the center ends later than at the periphery. In conventional parallel plate type dry etching equipment, the etching end time is different between the central part and the peripheral part of the surface of the sample to be etched.
There were many defects such as 15 etc., where the surrounding parts were quickly etched, which also caused a big problem in terms of reliability.

これは被エツチング試料表面に対向する電極が被エツチ
ング試料表面に対し平行な電極を用いていたことも大き
な要因となっている。
This is largely due to the fact that the electrode facing the surface of the sample to be etched is parallel to the surface of the sample to be etched.

本発明は被エツチング試料表面を均一にエツチングする
平行平板ドライエツチング装置を提供するものである。
The present invention provides a parallel plate dry etching apparatus that uniformly etches the surface of a sample to be etched.

〔問題点を解決するだめの手段〕[Failure to solve the problem]

本発明は平行な2枚の電極の一方に被エツチング試料を
載置し、両電極間に電界を形成して被エツチング試料を
エツチング処理する平行平板型ドライエツチング装置に
おいて、被エツチング試料の中心部と周辺部とに対する
前記両電極間距離を異ならせたことを特徴とする平行平
板型ドライエツチング装置である。
The present invention is a parallel plate type dry etching apparatus in which a sample to be etched is placed on one of two parallel electrodes and an electric field is formed between the two electrodes to etch the sample. This is a parallel plate type dry etching apparatus characterized in that the distance between the two electrodes is different from the distance between the electrodes and the peripheral portion.

〔実施例〕〔Example〕

以下、本発明の一実施例を図により説明する。 Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第1図において、本実施例は被エツチング試料5を載置
する電極3と対向する電極4のF面を中心部から周縁部
に向けて階段状に形成し、被エツチング試料5の中心部
に対する電極間距離t2と周辺部に対する電極間距離t
1とを異ならせ(11>12)。
In FIG. 1, in this embodiment, the F surface of the electrode 4, which faces the electrode 3 on which the sample 5 to be etched is placed, is formed in a step-like manner from the center toward the periphery. Inter-electrode distance t2 and inter-electrode distance t with respect to the peripheral area
1 (11>12).

被エツチング試料5の中心部に対し、周囲に向って電極
3,4間の電界分布が小さくなるようにしたものである
The electric field distribution between the electrodes 3 and 4 is made smaller toward the periphery with respect to the center of the sample 5 to be etched.

本発明によれば、被エツチング試料の中心部に対し、周
囲にむかって電極間の電界分布が小さくなる様な電極構
造となっているため、被エツチング試料の中心部と周囲
では電界分布が異なり、中心部と周囲のエツチング終了
時はほぼ同一時に均等にエツチングされ、試料内でのエ
ツチング74ラツキは少く、微細加工に対して有効なエ
ツチング形状が期待できる。本実施例は階段状の電極構
造をとっているが、おわん型又は直線1曲線形状にする
ことも可能である。
According to the present invention, the electrode structure is such that the electric field distribution between the electrodes decreases toward the periphery from the center of the sample to be etched, so the electric field distribution differs between the center and the periphery of the sample to be etched. When etching is completed at the center and the periphery, the etching is done evenly at almost the same time, there is little unevenness in etching within the sample, and an etched shape that is effective for microfabrication can be expected. Although this embodiment has a stepped electrode structure, it is also possible to use a bowl-shaped electrode structure or a linear one-curve shape.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は平行平板型エツチング装置
において、被エツチング試料表面に対向する電極間距離
を中心部から周囲へむかって異ならせて電界分布を変え
ることにより、被エツチング試料の中心部から周囲迄均
−なエツチングを行うことができる効果がある。
As explained above, the present invention uses a parallel plate type etching apparatus to change the electric field distribution by varying the distance between the electrodes facing the surface of the sample to be etched from the center to the periphery. This has the effect of allowing uniform etching to be performed all the way to the periphery.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す断面図、第2図は従来
の平行平板型エツチング装置の断面図、第3図は従来の
電極を示す断面図である。 l・・・エツチング反応槽、2・・・高周波電源、3,
4・・・電極、5・・・被エツチング試料特許出願人 
 日本電気株式会社 第3図
FIG. 1 is a sectional view showing an embodiment of the present invention, FIG. 2 is a sectional view of a conventional parallel plate type etching apparatus, and FIG. 3 is a sectional view of a conventional electrode. l... Etching reaction tank, 2... High frequency power supply, 3,
4... Electrode, 5... Sample to be etched Patent applicant
NEC Corporation Figure 3

Claims (1)

【特許請求の範囲】[Claims] (1)平行な2枚の電極の一方に被エッチング試料を載
置し、両電極間に電界を形成して被エッチング試料をエ
ッチング処理する平行平板型ドライエッチング装置にお
いて、被エッチング試料の中心部と周辺部とに対する前
記両電極間距離を異ならせたことを特徴とする平行平板
型ドライエッチング装置。
(1) In a parallel plate type dry etching apparatus in which a sample to be etched is placed on one of two parallel electrodes and an electric field is formed between both electrodes to etch the sample to be etched, the central part of the sample to be etched is A parallel plate type dry etching apparatus characterized in that the distance between the two electrodes and the peripheral part are different from each other.
JP18761285A 1985-08-27 1985-08-27 Parallel flat plate type dry etching device Pending JPS6247132A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18761285A JPS6247132A (en) 1985-08-27 1985-08-27 Parallel flat plate type dry etching device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18761285A JPS6247132A (en) 1985-08-27 1985-08-27 Parallel flat plate type dry etching device

Publications (1)

Publication Number Publication Date
JPS6247132A true JPS6247132A (en) 1987-02-28

Family

ID=16209152

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18761285A Pending JPS6247132A (en) 1985-08-27 1985-08-27 Parallel flat plate type dry etching device

Country Status (1)

Country Link
JP (1) JPS6247132A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7459098B2 (en) * 2002-08-28 2008-12-02 Kyocera Corporation Dry etching apparatus, dry etching method, and plate and tray used therein
US7556741B2 (en) 2002-08-28 2009-07-07 Kyocera Corporation Method for producing a solar cell
US7556740B2 (en) 2002-08-27 2009-07-07 Kyocera Corporation Method for producing a solar cell

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7556740B2 (en) 2002-08-27 2009-07-07 Kyocera Corporation Method for producing a solar cell
US7459098B2 (en) * 2002-08-28 2008-12-02 Kyocera Corporation Dry etching apparatus, dry etching method, and plate and tray used therein
US7556741B2 (en) 2002-08-28 2009-07-07 Kyocera Corporation Method for producing a solar cell

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