JPS59181620A - Reactive-ion etching method - Google Patents

Reactive-ion etching method

Info

Publication number
JPS59181620A
JPS59181620A JP5606283A JP5606283A JPS59181620A JP S59181620 A JPS59181620 A JP S59181620A JP 5606283 A JP5606283 A JP 5606283A JP 5606283 A JP5606283 A JP 5606283A JP S59181620 A JPS59181620 A JP S59181620A
Authority
JP
Japan
Prior art keywords
etching
sample
etched
lower electrode
ion etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5606283A
Other languages
Japanese (ja)
Inventor
Yukimasa Yoshida
幸正 吉田
Toru Watanabe
徹 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP5606283A priority Critical patent/JPS59181620A/en
Publication of JPS59181620A publication Critical patent/JPS59181620A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Abstract

PURPOSE:To improve the uniformity of etching depth by forming a recessed section to the upper surface of a lower electrode, shaping a specific angle of inclination to the base at a central section in the peripheral section of the recessed section, placing a material to be etched and etching the material. CONSTITUTION:A recessed section 21 for receiving a sample to be etched 6 is formed previously to the upper surface of a lower electrode 3. With the recessed section 17, the base 21 at a central section is flattened, a peripheral section 22 is inclined, and an angle within 90 deg. from 5 deg. to the base 21 at the central section such as approximately 30 deg. is used as the angle of inclination. A distance up to the surface of the sample from plasma is made larger than that up to the upper surface of the lower electrode 3 from plasma on an etching under the state in which the sample 6 is placed on the base 21 at the central section of the recessed section 17.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は大規模集積回路の製造過程において平行平板型
電極を有する反応性イオンエッチング装置,を用いて試
料をエツチングする反応性イオンエツチング方法に係り
、特にエツチングが主に反応生成物の除去により律速さ
れている物質をエツチングする方法に関する。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a reactive ion etching method for etching a sample using a reactive ion etching apparatus having parallel plate electrodes in the manufacturing process of large-scale integrated circuits. In particular, it relates to a method for etching materials whose etching rate is primarily rate-limited by the removal of reaction products.

〔発明の技術的背景〕[Technical background of the invention]

集積回路(IC)から大規模集積回路(LSI)へと素
子の高集積化、高速度化に伴って素子の微細加工性が要
求されている。このため、製造プロセス技術として湿式
エツチング、ケミカルドライエツチング( Chemi
cal Dry Etching : CDE ) ’
1どの等方的エッチングに代えてサイドエッチの生じな
い異方的エツチングが可能な反応性イオンエッチングが
広く用いられるようになった。
2. Description of the Related Art As devices become more highly integrated and operate at higher speeds, from integrated circuits (ICs) to large-scale integrated circuits (LSIs), microfabricability of devices is required. For this reason, wet etching and chemical dry etching (chemi) are used as manufacturing process technologies.
cal Dry Etching: CDE)'
1. Reactive ion etching, which allows anisotropic etching without side etching, has come to be widely used in place of isotropic etching.

ここで、反応性イオンエツチングの原理について簡単に
説明する。即ち、排気系を有する真空容器内に相対向し
て電極を設け、一方の電極および容器内壁全接地し、他
方の電極上にエツチングすべき試料を置き、上記容器内
に反応性ガスを導入し、上記他方の電極に高周波電力を
印加して上記ガスをプラズマ化する。このとき、高周波
を印加した電極には電子とイオンの移動度の差および高
周波を印加した電極と対向電極、容器内壁との面積の相
違により負の自己・ぐイアスが生じる。この負の自己バ
イアスは陰極降下電圧と呼ばれ、接地電位からの直流電
位■Dcで示される。そして、前記プラズマ中で発生し
た正イオンが上記自己バイアスにより加速され、エツチ
ング種を吸着した被エツチング試料表面に垂直に衝突し
、エツチング種と被エツチング物質との反応を保進し、
揮発性物質を生成することでエツチングを進行する。即
ち、エツチングは1、(lL)エツチング種と被エツチ
ング物質との反応速度、Φ)反応性がスの供給量、(C
)エツチング生成物の試料表面からの除去により律速さ
れる。上記(a)は反応律速と呼ばれ、添加がスなどに
゛よシ反応速度の増大を図る場合がちる。上記(b)は
供給律速と呼ばれ、典型的な例として多数枚の半導体ウ
エノ・−全同時にエツチングすると、一枚づつエツチン
グする場合に比べて抛位時間当りのエツチング深度(エ
ツチングレート)が低下す、るというローディング効果
がある。また、前記(C)のエツチング生成物の試料表
面からの除去は、エツチング生成物が常温での蒸気圧が
高い揮発性物質である場合には速やかに行なわれるので
問題は生じない。
Here, the principle of reactive ion etching will be briefly explained. That is, electrodes are placed facing each other in a vacuum container equipped with an exhaust system, one electrode and the inner wall of the container are all grounded, the sample to be etched is placed on the other electrode, and a reactive gas is introduced into the container. , applying high frequency power to the other electrode to turn the gas into plasma. At this time, negative self-bias occurs in the electrode to which the high frequency is applied due to the difference in mobility between electrons and ions and the difference in area between the electrode to which the high frequency is applied, the counter electrode, and the inner wall of the container. This negative self-bias is called a cathode drop voltage and is expressed as a direct current potential (dc) from the ground potential. The positive ions generated in the plasma are accelerated by the self-bias and collide perpendicularly to the surface of the etching target sample that has adsorbed the etching species, thereby promoting the reaction between the etching species and the etching target material,
Etching progresses by generating volatile substances. That is, etching requires 1, (1L) the reaction rate between the etching species and the material to be etched, Φ) the supply amount of the reactive gas, (C
) The rate is limited by the removal of etching products from the sample surface. The above (a) is called reaction rate-determining, and there are cases where the addition is intended to increase the reaction rate. The above (b) is called supply rate limiting, and a typical example is when a large number of semiconductor wafers are etched at the same time, the etching depth per wafer time (etching rate) is lower than when etching one wafer at a time. There is a loading effect. Further, the removal of the etching product (C) from the sample surface does not pose any problem because it is quickly removed if the etching product is a volatile substance with a high vapor pressure at room temperature.

〔背景技術の問題点〕[Problems with background technology]

しかし、上記エツチング生成物の常温での蒸気圧が低い
場合には、エツチングが試料光面上で一様に進まず、試
料面内でのエツチングレートの均一性が非常に悪い。た
とえばモリブデンシリサイドMo5i2e従来の反応性
イオンエツチング方法により電極上に置いてエツチング
した場合、エツチングレートの均一性が非常に悪く々る
。そこで本発明者らは、上記したような現象が生じる原
因を鋭意検討した結果、MoSi2のエツチングにおい
ては、反応生成物であるMoCl5もしくはMo0Ct
xの試料表面からの除去がエツチングを律速しているた
めであることが判明した。
However, if the etching product has a low vapor pressure at room temperature, etching does not proceed uniformly on the light surface of the sample, resulting in very poor etching rate uniformity within the sample surface. For example, when molybdenum silicide Mo5i2e is placed on an electrode and etched by the conventional reactive ion etching method, the uniformity of the etching rate is very poor. As a result of intensive investigation into the causes of the above-described phenomenon, the present inventors found that in etching MoSi2, the reaction products MoCl5 or Mo0Ct
It has been found that this is because the removal of x from the sample surface determines the rate of etching.

つまり、反応生成物であるMoCl5* Mo0Czz
の蒸気圧が低く、これらの反応生成物の除去が試料周辺
部で比較的速やかに行がわれ、エツチングが試料周辺部
から進行し、試料周辺部は中心部に比べてエツチング深
度が大きく々ってしまうためであることが明らかになっ
た。このように、エツチングが主として反応生成物の除
去によυ律速されている場合には、エツチング生成物の
蒸気圧が低いとエツチングレートの均一性が悪くなり、
生産性が著しく低下してしまうという問題が生じる。
In other words, the reaction product MoCl5*Mo0Czz
Because the vapor pressure of the sample is low, these reaction products are removed relatively quickly at the sample periphery, and etching progresses from the sample periphery, and the etching depth at the sample periphery is greater than that at the sample center. It became clear that this was because the In this way, if etching is primarily rate-limited by the removal of reaction products, the uniformity of the etching rate will deteriorate if the vapor pressure of the etching products is low;
A problem arises in that productivity is significantly reduced.

〔発明の目的〕[Purpose of the invention]

本発明は上記の事情に鑑みてなされたもので、エツチン
グが主に反応生成物の除去により律速されている場合に
被エツチング試料面内でのエツチング深度の均一性を向
上し得る反応性イオンエツチング方法を提供するもので
ある。
The present invention has been made in view of the above circumstances, and is a reactive ion etching method that can improve the uniformity of etching depth within the surface of a sample to be etched when the etching rate is mainly determined by the removal of reaction products. The present invention provides a method.

〔発明の概要〕[Summary of the invention]

即ち、本発明は、排気系を有する真空容器内に反応性ガ
スを導入し、上記容器内で対向する上部、下部電極間に
高周波電力を印加し、被エツチング物質を下部電極上に
載置してエツチングする反応性イオンエツチング方法に
おいて、前記下部電極の上面に凹部を設け、この四部の
周辺部には中央部底面に対して5度以上90度以内の傾
斜角を持たせておき、この凹部の中央部底面上にエツチ
ングが主に反応生成物の除去により律速されている被エ
ツチング物質を載置してエツチングすることを特徴とす
るものである。
That is, in the present invention, a reactive gas is introduced into a vacuum container having an exhaust system, high frequency power is applied between upper and lower electrodes facing each other in the container, and a material to be etched is placed on the lower electrode. In the reactive ion etching method, a recess is provided on the upper surface of the lower electrode, and the peripheral parts of these four parts have an inclination angle of 5 degrees or more and 90 degrees or more with respect to the bottom surface of the central part. This method is characterized in that a substance to be etched is placed on the bottom surface of the central part of the substrate, and the etching rate is mainly determined by the removal of reaction products.

これによって、試料を下部電極の平坦上面に置く場合に
比べて試料周辺部での反応生成物の除去がやや麟慢にな
り、試料面内での反応生成物の除去がほぼ一様に行なわ
れるようになる。
As a result, compared to when the sample is placed on the flat top surface of the lower electrode, reaction products are removed at a slightly slower rate around the sample, and reaction products are removed almost uniformly within the sample surface. It becomes like this.

〔発明の実施例〕[Embodiments of the invention]

以下、図面を参照して本発明の一実施例を詳細に説明す
る。第1図は、本発明方法で使用する反応性イオンエツ
チング装置を示している。
Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 shows a reactive ion etching apparatus used in the method of the present invention.

即ち、1は友とえばステンレス製の真空容器本体であり
、この容器本体1と組み合わされて真空容器を形成する
ように平行平板型電極を構成する上部電極2と下部電極
3とが対向配置されている。この場合、上記電極2,3
はそれぞれ絶縁性リング〔たとえば四弗化樹脂〕4,5
により真空容器本体1とは電気的に絶縁されている。6
は下部電極3上に置かれた被エツチング試料である。上
部電極2および下部電極3はそれぞれ冷却/4’イノ7
.8により水冷されるようになっている。9はたとえば
上部電極2の中央部に設けられたガス導入口である。1
0は真空容器本体1の側面部に連通ずる排気管であり、
外部の排気系(たとえばロータリーポンプ、油拡散ポン
プなど)に接続されている。11は高周波’it源であ
り、その高周波出力は切換スイッチ12によりインピー
ダンス整合器13を介して上部電極2へ、あるいはイン
ピーダンス整合器14を介して下部電極3へ印加される
。15は上部電極2に高周波出力が印加されないときに
これを接地するための切換スイッチであり、16は下部
電極3に高周波出力が印加されないときにこれを接地す
るための切換スイッチである0なお、真空容器本体1は
常に接地されている。
That is, 1 is a vacuum container main body made of stainless steel, for example, and an upper electrode 2 and a lower electrode 3, which constitute a parallel plate type electrode, are arranged facing each other so as to be combined with the container main body 1 to form a vacuum container. ing. In this case, the electrodes 2, 3
are insulating rings [for example, tetrafluoride resin] 4 and 5, respectively.
Therefore, it is electrically insulated from the vacuum container body 1. 6
is a sample to be etched placed on the lower electrode 3. The upper electrode 2 and the lower electrode 3 are each cooled/4' inno7
.. It is designed to be water cooled by 8. Reference numeral 9 denotes a gas inlet provided at the center of the upper electrode 2, for example. 1
0 is an exhaust pipe communicating with the side surface of the vacuum container body 1;
Connected to an external exhaust system (e.g. rotary pump, oil diffusion pump, etc.). Reference numeral 11 denotes a high frequency 'it source, and its high frequency output is applied by a changeover switch 12 to the upper electrode 2 via an impedance matching device 13 or to the lower electrode 3 via an impedance matching device 14. 15 is a change-over switch for grounding the upper electrode 2 when no high-frequency output is applied to it, and 16 is a change-over switch for grounding the lower electrode 3 when no high-frequency output is applied to it. The vacuum container body 1 is always grounded.

さらに、前記下部電極2の上面には、第2図に示すよう
に被エツチング試料6を収容するための四部(ザグリ)
21が設けられており、この凹部17は中央部底面2ノ
が平坦であり、周辺部22が傾斜しており、との傾余1
角度θは中央部底面21に対してたとえば約30度に力
っている。との凹部17の中央部底面2ノに試料6が載
置された秋暢では、エツチング時においてプラズマから
試料光面までの距離がプラズマから下部電極上面までの
距離よりも遠いものと力る。
Further, on the upper surface of the lower electrode 2, there are four parts (spot holes) for accommodating the sample 6 to be etched, as shown in FIG.
21 is provided, and this recess 17 has a flat bottom surface 2 at the center and an inclined peripheral section 22, with an inclination margin of 1.
The angle θ is approximately 30 degrees with respect to the center bottom surface 21, for example. When the sample 6 is placed on the central bottom surface 2 of the recess 17, the distance from the plasma to the sample light surface is assumed to be longer than the distance from the plasma to the upper surface of the lower electrode during etching.

第3図は、前記被エツチング試料6の一例を示しており
、半導体基板、たとえば4インチ単結晶シリコンウェハ
ー31上に熱酸化法により膜厚1700Xのシリコン酸
化膜32を形成し、その上にスパッタリング法によりモ
リブデンシリサイドMO8i233を4000X堆積し
たあとポジ型レジスト(商品名0FPR800:東京応
用化学工業株式会社)34でエツチングマスクを形成し
たものである。
FIG. 3 shows an example of the sample 6 to be etched, in which a silicon oxide film 32 with a thickness of 1700× is formed on a semiconductor substrate, for example, a 4-inch single crystal silicon wafer 31, by thermal oxidation method, and sputtering is performed on the silicon oxide film 32. After depositing molybdenum silicide MO8i233 at 4000X by the method, an etching mask was formed using a positive resist (trade name 0FPR800: Tokyo Applied Chemical Industry Co., Ltd.) 34.

そして、本発明方法においては、前述した第1図のエツ
チング装置を用いて、たとえば次のようなエツチング条
件にてエツチングを行々う。
In the method of the present invention, etching is performed using the above-mentioned etching apparatus shown in FIG. 1 under, for example, the following etching conditions.

即ち、真空容器内に導入する反応性ガスとして塩素(C
62)358ccM、酸素(02)5secMの混合ガ
スを用いて真空容器内が0.4 Torrの圧力となる
ように調節し、下部電極3に印加する高周波電力’f’
 13.56 MHz、0.3 W/cm2とし、下部
電極2を接地する。なお、このエツチングの原理は前述
した通りであり、ここでは詳述を省略する。
That is, chlorine (C
62) Using a mixed gas of 358 ccM and 5 secM of oxygen (02), adjust the pressure in the vacuum container to 0.4 Torr, and apply high frequency power 'f' to the lower electrode 3.
13.56 MHz, 0.3 W/cm2, and the lower electrode 2 is grounded. Note that the principle of this etching is as described above, and detailed explanation will be omitted here.

上記方法によりたとえば1分間エツチングした後、試料
6のレジスト34を硫酸系の溶液で剥離してMo5t 
23Jのエツチング深度を適当な測定手段(たとえばタ
リステップ)により試料面内の20箇所(第4図P1〜
P20参照)で測定したデータを第5図に示す。この図
から分るように、試料面内でのエツチング深度の均一性
は非常に良い。ここで、エツチング深度の平均をマ、正
規分布の標準偏差をσで表わすと、エツチング深度のば
らつきの度合を示す3σ/マは0.07の如く小さい。
After etching for 1 minute by the above method, the resist 34 of sample 6 is peeled off with a sulfuric acid solution and Mo5t is etched.
The etching depth of 23J was measured at 20 locations on the sample surface (Fig. 4, P1 to
FIG. 5 shows the data measured in (see page 20). As can be seen from this figure, the uniformity of the etching depth within the sample plane is very good. Here, if the average etching depth is represented by ma and the standard deviation of the normal distribution is represented by σ, then 3σ/ma, which indicates the degree of variation in etching depth, is as small as 0.07.

々お、上記方法による効果と比較するために、第6図に
示すように下部電極Jに凹部を設けることなく、下部電
極3′の平坦上面に前記同様の試料6を置き前記同様の
エツチング条件でエツチングを行ない、前記同様の測定
を行なって得られた結果を第7図に示す。この図から明
らかなように、エツチング深度は試料面内で中心部に比
べて周辺部が大きくなり、エツチング深度の均一性は非
常に悪く、深度のばらつき3侑は0.30の如く太きい
In order to compare the effect of the above method, a sample 6 similar to that described above was placed on the flat upper surface of the lower electrode 3' without providing a recess in the lower electrode J, as shown in FIG. 6, and etched under the same etching conditions as described above. FIG. 7 shows the results obtained by performing etching and performing the same measurements as described above. As is clear from this figure, the etching depth is larger at the periphery than at the center within the sample surface, the uniformity of the etching depth is very poor, and the depth variation is as large as 0.30.

即ち、上面全面が平坦状の下部電極を用いた場合にエツ
チング深度の均一性が非常に悪くなる原因td−1Mo
Si2のエツチングにおいては反応性生成物であるMo
CAsもしくはMo0C1zの試料表面からの除去がエ
ツチングを律速しており、MoC75s Mo0C7x
の蒸気圧が低いためにこれらの除去が比較的速やかに行
なわれる試別表面部からエツチングが進行するからであ
る。
In other words, when using a lower electrode whose entire upper surface is flat, the reason why the uniformity of etching depth becomes extremely poor is that td-1Mo
In the etching of Si2, the reactive product Mo
Removal of CAs or Mo0C1z from the sample surface determines the etching rate, and MoC75s Mo0C7x
This is because etching proceeds from the sampled surface portion where these are removed relatively quickly due to the low vapor pressure of the etching.

これに対して、前述したように本発明方法は下部電極に
凹部を設け、との凹部の周辺部に傾斜を持たせ、凹部内
に試料を置くようにした。
On the other hand, as described above, in the method of the present invention, a recess is provided in the lower electrode, the periphery of the recess is sloped, and the sample is placed within the recess.

これによって、試料周辺部での反応生成物の除去がやや
緩慢になり、試料面内での反応生成物の除去がほぼ一様
に行なわれるようになった。
As a result, the removal of reaction products around the sample became somewhat slow, and the reaction products were removed almost uniformly within the surface of the sample.

々お、本発明方法は、上記実施例のMo S i2に限
らず、エツチングが主に反応生成物の除去により律速さ
れている物質一般に対して適用できる。また、前記凹部
はその平坦底面上に試料が載置され、試料周辺部近傍の
凹部周辺部が上記平坦底面に対してなす傾斜角は、反応
生成物の蒸気圧の違いによる試料表面からの除去の態様
に応じて約5度以上90度以内の如く広い範囲内で選択
設定し得るものである。また、多数枚の試料を同時にエ
ツチングする場合には、下部電極の中央部および周辺部
にそれぞれ設ける凹部の周辺部傾斜角度をそれぞれ異な
らせておいて各試料のエツチング深度の均一性を向上す
るようにしてもよい。
The method of the present invention is applicable not only to MoSi2 in the above embodiment, but also to other materials in general whose rate of etching is mainly determined by the removal of reaction products. In addition, the sample is placed on the flat bottom of the recess, and the angle of inclination that the peripheral part of the recess near the sample periphery makes with respect to the flat bottom is determined by the difference in vapor pressure of the reaction product. The angle can be selected and set within a wide range, such as from about 5 degrees to 90 degrees, depending on the aspect. In addition, when etching multiple samples at the same time, it is possible to improve the uniformity of the etching depth for each sample by making the peripheral inclination angles of the recesses provided at the center and the periphery of the lower electrode different. You can also do this.

〔発明の効果〕〔Effect of the invention〕

上述したように本発明の反応性イオンエツチング方法に
よれば、エツチングが主に反応生成物の除去によV律速
されている場合に被エツチング深度の均一性を向上させ
ることができ、生産性の向上に寄与することができる。
As described above, according to the reactive ion etching method of the present invention, when etching is rate-limited mainly by the removal of reaction products, the uniformity of the depth to be etched can be improved, and productivity can be improved. can contribute to improvement.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係るプラズマエツチング方法で使用す
る反応性イオンエツチング装置の一例を示す構成説明図
、第2図は第1図の装置における下部電極の凹部部分を
取り出して拡大して示す側断面図、第3図は第2図の凹
部に載置場れる試料の一例を示す断面図、第4図は第3
図の試料のエツチング後におけるエツチング深度測定箇
所を示す平面図、第5図は第4図の測定箇所におけるエ
ツチング深度測定結果を示す図、第6図は本発明方法と
の比較のための方法で使用する下部電極と試料の載置状
態とを示す側断面図、第7図は第6図の状態の試料のエ
ツチング後におけるエツチング深度測定結果を示す図で
ある。 1・・・真空容器本体、2・・・上部電極、3・・・下
部電極、6・・・試料、9・・・ガス導入口、10・・
・排気管、1ノ・・・高周波電源、17・・・凹部、2
ノ・・・中央部底面、22・・・周辺部、31・・・単
結晶シリコンウェハー、32・・・シリコン酸化FJL
33・・・モリブデンシリサイド、34・・・ポジ型レ
ジスト、θ・・・傾斜角度。 出願人代理人  弁理士 鈴 江 武 彦10
FIG. 1 is a configuration explanatory diagram showing an example of a reactive ion etching apparatus used in the plasma etching method according to the present invention, and FIG. 2 is an enlarged view of the concave portion of the lower electrode of the apparatus shown in FIG. 3 is a sectional view showing an example of a sample placed in the recess shown in FIG. 2, and FIG.
Figure 5 is a plan view showing the etching depth measurement location after etching the sample shown in Figure 5, Figure 5 is a diagram showing the etching depth measurement results at the measurement location in Figure 4, and Figure 6 is a diagram showing a method for comparison with the method of the present invention. FIG. 7 is a side sectional view showing the lower electrode used and the mounting state of the sample, and FIG. 7 is a diagram showing the etching depth measurement results after etching the sample in the state of FIG. 6. DESCRIPTION OF SYMBOLS 1...Vacuum container main body, 2...Upper electrode, 3...Lower electrode, 6...Sample, 9...Gas inlet, 10...
・Exhaust pipe, 1...High frequency power supply, 17...Recess, 2
No...Central bottom surface, 22...Peripheral part, 31...Single crystal silicon wafer, 32...Silicon oxidation FJL
33...Molybdenum silicide, 34...Positive resist, θ...Inclination angle. Applicant's agent Patent attorney Takehiko Suzue10

Claims (3)

【特許請求の範囲】[Claims] (1)排気系を有する真空容器内に反応性ガスを導入し
、上記容器内で対向する上部、下部電極間に高周波電力
を印加し、下部電極上に被エツチング物質を載置してエ
ツチングする反応性イオンエツチング方法において、前
記下部電極の上面に凹部を設け、との凹部の周辺部には
中央部底面に対して5度以上90度以内の傾斜角を持た
せておき、との凹部の中央部底面上にエツチングが主に
反応生成物の除去により律速されている被エツチング物
質を載置してエツチングすることを特徴とする反応性イ
オンエツチング方法。
(1) A reactive gas is introduced into a vacuum container equipped with an exhaust system, high-frequency power is applied between upper and lower electrodes facing each other in the container, and the material to be etched is placed on the lower electrode and etched. In the reactive ion etching method, a recess is provided on the upper surface of the lower electrode, and the peripheral part of the recess has an inclination angle of 5 degrees to 90 degrees with respect to the bottom surface of the central part, and A reactive ion etching method characterized in that etching is performed by placing a material to be etched on the bottom surface of a central portion, the etching rate of which is mainly determined by the removal of reaction products.
(2)前記被エツチング物質は、シリコン単結晶からな
る積層物質上に形成されていることを特徴とする特許 応性イオンエツチング方法。
(2) A patented reactive ion etching method characterized in that the material to be etched is formed on a laminated material made of silicon single crystal.
(3)  前記、被エツチング物質上にはパターン形成
されたエツチングマスクが存在することを特徴とする前
記特許請求の範囲第1項才たは第2項“記載の反応性イ
オンエツチング方法。
(3) The reactive ion etching method according to claim 1 or 2, characterized in that a patterned etching mask is present on the material to be etched.
JP5606283A 1983-03-31 1983-03-31 Reactive-ion etching method Pending JPS59181620A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5606283A JPS59181620A (en) 1983-03-31 1983-03-31 Reactive-ion etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5606283A JPS59181620A (en) 1983-03-31 1983-03-31 Reactive-ion etching method

Publications (1)

Publication Number Publication Date
JPS59181620A true JPS59181620A (en) 1984-10-16

Family

ID=13016591

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5606283A Pending JPS59181620A (en) 1983-03-31 1983-03-31 Reactive-ion etching method

Country Status (1)

Country Link
JP (1) JPS59181620A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5443689A (en) * 1991-12-11 1995-08-22 Matsushita Electric Industrial Co., Ltd. Dry etching process utilizing a recessed electrode

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5186372A (en) * 1975-01-28 1976-07-28 Tokyo Shibaura Electric Co HANDOTAISOCHINOSEIZOHOHO
JPS5643725A (en) * 1979-09-19 1981-04-22 Toshiba Corp Etching device
JPS5731140A (en) * 1980-07-31 1982-02-19 Toshiba Corp Etching method by reactive ion

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5186372A (en) * 1975-01-28 1976-07-28 Tokyo Shibaura Electric Co HANDOTAISOCHINOSEIZOHOHO
JPS5643725A (en) * 1979-09-19 1981-04-22 Toshiba Corp Etching device
JPS5731140A (en) * 1980-07-31 1982-02-19 Toshiba Corp Etching method by reactive ion

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5443689A (en) * 1991-12-11 1995-08-22 Matsushita Electric Industrial Co., Ltd. Dry etching process utilizing a recessed electrode

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