JPS60144242U - Resin-encapsulated integrated circuit - Google Patents

Resin-encapsulated integrated circuit

Info

Publication number
JPS60144242U
JPS60144242U JP3145484U JP3145484U JPS60144242U JP S60144242 U JPS60144242 U JP S60144242U JP 3145484 U JP3145484 U JP 3145484U JP 3145484 U JP3145484 U JP 3145484U JP S60144242 U JPS60144242 U JP S60144242U
Authority
JP
Japan
Prior art keywords
resin
integrated circuit
encapsulated integrated
lead frame
chip components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3145484U
Other languages
Japanese (ja)
Inventor
清 福田
Original Assignee
日本ビクター株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本ビクター株式会社 filed Critical 日本ビクター株式会社
Priority to JP3145484U priority Critical patent/JPS60144242U/en
Publication of JPS60144242U publication Critical patent/JPS60144242U/en
Pending legal-status Critical Current

Links

Landscapes

  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の樹脂封止集積回路の構造を示す側面図、
第2図はこの考案になる樹脂封止集積回路の★施例を示
す側面図、第3図はそのプリント基板への取付は状態と
外部電界との関係を示す−□部のみを表わした側面図で
ある。 1・・・チップ部品、2・・・リードフレーム、3・・
・パッケージ捺印面、4・・・樹脂、5・・・プリント
基板1.6・・・パターン、7・・・外部電界。
Figure 1 is a side view showing the structure of a conventional resin-sealed integrated circuit;
Figure 2 is a side view showing an example of the resin-sealed integrated circuit according to this invention, and Figure 3 is a side view showing only the □ section showing the relationship between the mounting state on a printed circuit board and the external electric field. It is a diagram. 1...Chip parts, 2...Lead frame, 3...
・Package printing surface, 4...Resin, 5...Printed circuit board 1.6...Pattern, 7...External electric field.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] チップ部品をリードフレー今に接着後、こ(ら−を樹脂
封止して作られる集積回路において、上記樹脂封止した
、その樹脂片面に捺印するパッケージ捺印面とは反対側
に、上記チップ部品をリードフレームに接着して配置す
るようにしたことを特徴とする樹脂封止集積回路。
After bonding the chip components to the lead frame, in an integrated circuit made by resin-sealing them, the chip components are placed on the opposite side of the resin-sealed package, which is stamped on one side of the resin. A resin-sealed integrated circuit characterized by being arranged by adhering to a lead frame.
JP3145484U 1984-03-05 1984-03-05 Resin-encapsulated integrated circuit Pending JPS60144242U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3145484U JPS60144242U (en) 1984-03-05 1984-03-05 Resin-encapsulated integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3145484U JPS60144242U (en) 1984-03-05 1984-03-05 Resin-encapsulated integrated circuit

Publications (1)

Publication Number Publication Date
JPS60144242U true JPS60144242U (en) 1985-09-25

Family

ID=30532078

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3145484U Pending JPS60144242U (en) 1984-03-05 1984-03-05 Resin-encapsulated integrated circuit

Country Status (1)

Country Link
JP (1) JPS60144242U (en)

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