JPS60141135U

JPS60141135U - transistor device

Info

Publication number: JPS60141135U
Application number: JP2672784U
Authority: JP
Inventors: 武沢田; 真一井上
Original assignee: 株式会社東芝
Priority date: 1984-02-28
Filing date: 1984-02-28
Publication date: 1985-09-18

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来の小信号用ＧａＡｓＦＥＴを上方からみた
図、第２図は第１図に示した小信号用ＧａＡｓＦ　ＥＴ
を用いたソース接地増幅回路のバイアス供給方式を説明
するための図、第３図は第１図に示した小信号用ＧａＡ
ｓＦＥＴの接地方式の従来例の断面図、第４図は本考案
の高周波トランジスタ装置の一実施例の上蓋をとった平
面図、第５図は第４図に示した本考案の一実施例のＡ　
−Ａ’断面図である。１・・・ゲート端子、２・・・ドレイン端子、３・・・
ソース端子、５・・・パッケージ、６・・・コンデンサ
、７・・・スルーホール、８・・・誘電体、９・・・導
体パターン、１０・・・地導体、１１・・・抵抗、１２
・・・可変抵抗、１，２３・・・トランジスタチップ、
１４・・・導体基板、１５．１６・・・誘電体フレーム
、１８・・・ボンデングワイヤ、１９・・・上蓋、２１
・・・ゲート端子、２２・・・ドレイン端子、２３・・
・ソース端子。Figure 1 shows a conventional small-signal GaAsFET seen from above, and Figure 2 shows the small-signal GaAsFET shown in Figure 1.
Figure 3 is a diagram for explaining the bias supply method of a source-grounded amplifier circuit using a GaA amplifier circuit for small signals shown in Figure 1.
4 is a cross-sectional view of a conventional example of a grounded sFET, FIG. 4 is a plan view with the top removed of an embodiment of the high frequency transistor device of the present invention, and FIG. 5 is a diagram of the embodiment of the present invention shown in FIG. 4. A
-A' sectional view. 1...Gate terminal, 2...Drain terminal, 3...
Source terminal, 5... Package, 6... Capacitor, 7... Through hole, 8... Dielectric, 9... Conductor pattern, 10... Ground conductor, 11... Resistor, 12
...Variable resistor, 1,23...Transistor chip,
14... Conductor substrate, 15.16... Dielectric frame, 18... Bonding wire, 19... Upper lid, 21
...Gate terminal, 22...Drain terminal, 23...
・Source terminal.

Claims

[Scope of utility model registration request]

A conductive thug connected to the ground, a transistor chip installed on this conductive substrate, a terminal led out from this transistor chip, and a high dielectric material interposed as a capacitive element between this terminal and said conductive substrate. 1. A transistor device comprising: a dielectric material having a dielectric constant.