JPS60112163A - デバイスアドレス設定方式 - Google Patents

デバイスアドレス設定方式

Info

Publication number
JPS60112163A
JPS60112163A JP21876983A JP21876983A JPS60112163A JP S60112163 A JPS60112163 A JP S60112163A JP 21876983 A JP21876983 A JP 21876983A JP 21876983 A JP21876983 A JP 21876983A JP S60112163 A JPS60112163 A JP S60112163A
Authority
JP
Japan
Prior art keywords
device address
printed circuit
circuit board
type
backboard
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21876983A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0421898B2 (enrdf_load_html_response
Inventor
Satoru Nakagawa
哲 中川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP21876983A priority Critical patent/JPS60112163A/ja
Publication of JPS60112163A publication Critical patent/JPS60112163A/ja
Publication of JPH0421898B2 publication Critical patent/JPH0421898B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP21876983A 1983-11-22 1983-11-22 デバイスアドレス設定方式 Granted JPS60112163A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21876983A JPS60112163A (ja) 1983-11-22 1983-11-22 デバイスアドレス設定方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21876983A JPS60112163A (ja) 1983-11-22 1983-11-22 デバイスアドレス設定方式

Publications (2)

Publication Number Publication Date
JPS60112163A true JPS60112163A (ja) 1985-06-18
JPH0421898B2 JPH0421898B2 (enrdf_load_html_response) 1992-04-14

Family

ID=16725103

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21876983A Granted JPS60112163A (ja) 1983-11-22 1983-11-22 デバイスアドレス設定方式

Country Status (1)

Country Link
JP (1) JPS60112163A (enrdf_load_html_response)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5534750A (en) * 1978-09-04 1980-03-11 Hitachi Ltd Device address set system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5534750A (en) * 1978-09-04 1980-03-11 Hitachi Ltd Device address set system

Also Published As

Publication number Publication date
JPH0421898B2 (enrdf_load_html_response) 1992-04-14

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